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参数资料
| 型号： | NBSG72AMNR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 13/14页 |
| 文件大小： | 0K |
| 描述： | IC CROSSPOINT SWITCH 2X2 16QFN |
| 标准包装： | 3,000 |
| 功能： | 交叉点开关 |
| 电路： | 1 x 2:2 |
| 电压电源： | 双电源 |
| 电压 - 电源，单路/双路(±)： | ±2.38 V ~ 3.47 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-VFQFN 裸露焊盘 |
| 供应商设备封装： | 16-QFN（3x3） |
| 包装： | 带卷 (TR) |
NBSG72A
http://onsemi.com
8
Table 10. AC CHARACTERISTICS VCC = 0 V; VEE = 3.465 V to 2.375 V or VCC = 2.375 V to 3.465 V; VEE = 0 V (Note 18)
Symbol
Characteristic
40°C
25°C
85°C
Unit
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
VOUTPP Output Voltage Amplitude
fin < 5 GHz
(Note 18)
fin v 7 GHz
400
200
590
250
450
180
590
250
440
130
590
250
mV
tPLH
Propagation Delay to Output Differential
D0, D1 → Q0, Q1
SELA, SELB → Q0, Q1
170
190
205
265
255
350
170
190
205
265
255
350
170
190
210
265
260
350
ps
tPHL
Propagation Delay to Output Differential
D0, D1 → Q0, Q1
SELA, SELB → Q0, Q1
170
150
205
215
255
270
170
150
205
215
255
270
170
150
210
215
260
270
ps
tSKEW
Duty Cycle Skew (Note 19)
WithinDevice Skew
DevicetoDevice Skew
5.0
15
25
50
5.0
15
25
50
5.0
15
25
50
ps
tJITTER
RMS Random Clock Jitter (Note 20)
v 1 GHz
OLS = VCC
v 5 GHz
OLS = VCC
v 6.5 GHz
OLS = VCC
v 1 GHz
OLS = VCC 400 mV
v 5 GHz
OLS = VCC 400 mV
v 6.5 GHz
OLS = VCC 400 mV
v 1 GHz
OLS = VCC 800 mV
v 5 GHz
OLS = VCC 800 mV
v 6.5 GHz
OLS = VCC 800 mV
v 1 GHz
OLS = VEE
v 5 GHz
OLS = VEE
v 6.5 GHz
OLS = VEE
PeaktoPeak Data Dependent Jitter
(Note 21)
fin v 7 Gb/s
0.16
0.14
0.21
0.23
0.18
0.2
0.17
0.14
0.2
0.18
0.16
0.18
12
0.3
0.4
0.5
0.4
0.5
0.3
0.4
0.5
0.3
0.6
0.5
18
0.17
0.16
0.31
0.23
0.19
0.25
0.18
0.16
0.27
0.19
0.17
0.24
12
0.3
0.4
0.7
0.4
0.5
0.6
0.3
0.7
0.3
0.4
0.6
18
0.18
0.19
0.44
0.25
0.23
0.32
0.19
0.2
0.38
0.2
0.34
12
0.4
0.9
0.4
0.5
0.7
0.3
0.9
0.3
0.4
0.8
18
ps
VINPP
Input Voltage Swing/Sensitivity
(Differential Configuration) (Note 22)
75
2600
75
2600
75
2600
mV
tr
tf
Output Rise/Fall Times
(Q0, Q1)
(20% 80%)
tr
@ 1 GHz
tf
40
30
55
45
70
55
40
30
55
45
70
55
40
30
55
45
70
55
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
18.Measured using a 75 mV source, 50% duty cycle clock source. All loading with 50 W to VCC 2.0 V. OLS = FLOAT. Input edge rates 40 ps
(20% 80%).
19.tSKEW = |tPLH tPHL| for a nominal 50% differential clock input waveform.
20.Additive RMS jitter with 50% Duty Cycle clock signal.
21.Additive PeaktoPeak data dependent jitter with NRZ PRBS 2311 data at 7 Gb/s.
22.Input Voltage Swing is a singleended measurement operating in differential mode. VINPP (max) cannot exceed VCC VEE.
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