参数资料
型号: NC7S02L6X
厂商: Fairchild Semiconductor
文件页数: 1/8页
文件大小: 0K
描述: IC GATE NOR 2-INP HS 6-MICROPAK
产品变化通告: Die Material, Mold Compound Change 03/Oct/2008
标准包装: 5,000
系列: 7S
逻辑类型: 或非门
电路数: 1
输入数: 2
电源电压: 2 V ~ 6 V
电流 - 静态(最大值): 1µA
输出电流高,低: 2.6mA,2.6mA
逻辑电平 - 低: 0.5V
逻辑电平 - 高: 1.5V
额定电压和最大 CL 时的最大传播延迟: 17ns @ 6V,50pF
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
供应商设备封装: Micro6?(TSOP-6)
封装/外壳: 6-UFDFN
包装: 带卷 (TR)
2004 Fairchild Semiconductor Corporation
DS012140
www.fairchildsemi.com
October 1995
Revised August 2004
NC7S02
T
inyLo
gic
HS
2-I
nput
NOR
Gat
e
NC7S02
TinyLogic
HS 2-Input NOR Gate
General Description
The NC7S02 is a single 2-Input high performance CMOS
NOR Gate. Advanced Silicon Gate CMOS fabrication
assures high speed and low power circuit operation over a
broad VCC range. ESD protection diodes inherently guard
both inputs and output with respect to the VCC and GND
rails. Three stages of gain between inputs and outputs
assures high noise immunity and reduced sensitivity to
input edge rate.
Features
s Space saving SOT23 or SC70 5-lead packages
s Ultra small MicroPak
leadless package
s High Speed; tPD 3.5 ns typ
s Low Quiescent Power; ICC < 1 A
s Balanced Output Drive; 2 mA IOL, 2 mA IOH
s Broad VCC Operating Range; 2V–6V
s Balanced Propagation Delays
s Specified for 3V operation
Ordering Code:
Logic Symbol
IEEE/IEC
Pin Descriptions
Function Table
H
= HIGH Logic Level
L
= LOW Logic Level
Connection Diagrams
Pin Assignments for SOT23 and SC70
(Top View)
Pad Assignments for MicroPak
(Top Through View)
TinyLogic
is a registered trademark of Fairchild Semiconductor Corporation.
MicroPak
is a trademark of Fairchild Semiconductor Corporation.
Order Number
Package
Product Code
Package Description
Supplied As
Number
Top Mark
NC7S02M5X
MA05B
7S02
5-Lead SOT23, JEDEC MO-178, 1.6mm
3k Units on Tape and Reel
NC7S02P5X
MAA05A
S02
5-Lead SC70, EIAJ SC-88a, 1.25mm Wide
3k Units on Tape and Reel
NC7S02L6X
MAC06A
E4
6-Lead MicroPak, 1.0mm Wide
5k Units on Tape and Reel
Pin Names
Description
A, B
Inputs
Y
Output
NC
No Connect
Y
= A + B
Inputs
Output
AB
Y
LL
H
LH
L
HL
L
HH
L
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