参数资料
型号: NCN6000DTBR2
厂商: ON Semiconductor
文件页数: 19/36页
文件大小: 0K
描述: IC INTERFACE SMART CARD 20TSSOP
产品变化通告: Product Obsolescence 01/Jul/2009
标准包装: 1
应用: ATM 终端,气泵,ISM
接口: 微控制器
电源电压: 2.7 V ~ 6 V
封装/外壳: 20-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 20-TSSOP
包装: 标准包装
安装类型: 表面贴装
产品目录页面: 1131 (CN2011-ZH PDF)
其它名称: NCN6000DTBR2OSDKR
NCN6000
http://onsemi.com
26
The example given by the oscillogram here above
highlights the delay coming from the internal clock duty
cycle resynchronization. In this example, the clock is
internally divided by 2 prior to be applied to the CRD_CLK
pin. Since the clock signal is asynchronous, it is up to the
programmer to make sure the next card transaction is not
activated before the CRD_CLK signal has been updated.
Generally speaking, such a delay can be derived from the
maximum clock frequency provided to the interface,
keeping in mind the maximum delay is eight incoming clock
pulses.
Figure 25. Clock Programming Examples
The clock can be reprogrammed without halting the rest
of the circuit, whatever be the new clock divider ratio. In
particular, the CRD_VCC can be applied to the card while
the clock is reprogrammed.
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