参数资料
型号: NCP1201D100R2G
厂商: ON Semiconductor
文件页数: 11/19页
文件大小: 0K
描述: IC CTRLR PWM CM OTP 8SOIC
产品变化通告: Product Obsolescence 01/Jul/2009
标准包装: 1
输出隔离: 隔离
频率范围: 92kHz ~ 117kHz
输入电压: 12.5 V ~ 16 V
输出电压: 500V
工作温度: -40°C ~ 150°C
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOICN
包装: 剪切带 (CT)
其它名称: NCP1201D100R2GOSCT
NCP1201
Our power contribution example drops to 223 V x 2.1 m
= 468.3 mW. If a resistor is installed between the mains and
the diode, you further force the dissipation to migrate from
the package to the resistor. The resistor value should be
carefully selected to account for low--line startup.
HV
Skipping Cycle Mode
The NCP1201 automatically skips switching cycles when
the output power demand drops below a preset level. This is
accomplished by monitoring the FB pin. In normal
operation, FB pin imposes a peak current according to the
load value. If the load demand decreases, the internal loop
asks for less peak current. When this set--point reaches the
skip mode threshold level, 1.07 V, the IC prevents the
current from decreasing further down and starts to blank the
Mains
Cbulk
1
2
3
4
8
7
6
5
output pulses, i.e. the controller enters the so--called Skip
Cycle Mode, also named Controlled Burst Operation. The
power transfer now depends upon the width of the pulse
bunches, Figure 29.
Suppose we have the following component values:
Lp , primary inductance = 1.0 mH
F sw , switching frequency = 60 kHz
1 × L × I 2 × F
sw = 1.2 W
p
p
Figure 28. A Simple Diode Naturally Reduces the
Average Voltage on Pin 8
3. Permanently force the V CC level above VCC OFF
with an auxiliary winding. It will automatically
disconnect the internal startup source and the IC
will be fully self--supplied from this winding.
Again, the total power drawn from the mains will
significantly decrease. By using this approach,
user need to make sure the auxiliary voltage never
I p (skip) = 200 mA (or 333 mV/R sense )
The theoretical power transfer is therefore:
(eq. 4)
2
If the controller enters Skip Cycle Mode with a pulse packet
length of 20 ms over a recurrent period of 100 ms, then the
total power transfer reduced to 1.2 W x 0.2 = 240 mW.
To better understand how this Skip Cycle Mode takes
place, a look at the operation mode versus the FB pin voltage
level shown below, immediately gives the necessary insight.
exceeds the 16 V limit for all line conditions.
FB
4.2 V, FB Pin Open
2.97 V, Upper Dynamic Range
Normal Current Mode Operation
Skip Cycle Operation
1.07 V
I p(min) = 333 mV / R sense
Figure 29. Feedback Pin Voltage and Modes of Operation
When FB pin voltage level is above the skip cycle threshold
(1.07 V by default), the peak current cannot exceed
0.9 V/R sense . When the IC enters the skip cycle mode, the
peak current cannot go below V SKIP /3.3. By using the peak
current limit reduction scheme, the skip cycle takes place at
a lower peak current, which guarantees noise free operation.
http://onsemi.com
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