参数资料
型号: NCP1217AD100R2G
厂商: ON Semiconductor
文件页数: 14/19页
文件大小: 0K
描述: IC CTRLR PWM CM OVP HV 8SOIC
标准包装: 1
输出隔离: 隔离
频率范围: 90kHz ~ 110kHz
输入电压: 8.3 V ~ 16 V
工作温度: 0°C ~ 125°C
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOICN
包装: 剪切带 (CT)
其它名称: NCP1217AD100R2GOSCT
NCP1217, NCP1217A
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2
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internal parasitic SCRs are triggered, engendering
irremediable damages to the IC if a low impedance path is
offered between V CC and GND. If the current sense pin is
often the seat of such spurious signals, the high--voltage pin
ON/OFF
Q1
4
5
can also be the source of problems in certain circumstances.
During the turn--off sequence, e.g. when the user unplugs the
power supply, the controller is still fed by its V CC capacitor
and keeps activating the MOSFET ON and OFF with a peak
current limited by Rsense. Unfortunately, if the quality
Figure 26. Another Way of Shutting Down the IC
Without a Definitive Latchoff State
Protecting the Controller Against Negative Spikes
As with any controller built upon a CMOS technology, it
is the designer ’s duty to avoid the presence of negative
spikes on sensitive pins. Negative signals have the bad habit
to forward bias the controller substrate and induce erratic
behaviors. Sometimes, the injection can be so strong that
coefficient Q of the resonating network formed by Lp and
Cbulk is low (e.g. the MOSFET Rdson + Rsense are small),
conditions are met to make the circuit resonate and thus
negatively bias the controller. Since we are talking about ms
pulses, the amount of injected charge (Q = I * t) immediately
latches the controller that brutally discharges its V CC
capacitor. If this V CC capacitor is of sufficient value, its
stored energy damages the controller. Figure 27 depicts a
typical negative shot occurring on the HV pin where the
brutal V CC discharge testifies for latchup.
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