参数资料
型号: NCP1230D65R2
厂商: ON Semiconductor
文件页数: 2/21页
文件大小: 0K
描述: IC CTRLR PWM SMPS OVP OCP 8SOIC
产品变化通告: LTB Notification 03/Jan/2008
标准包装: 2,500
输出隔离: 隔离
频率范围: 65kHz
输入电压: 8.4 V ~ 18 V
工作温度: -40°C ~ 125°C
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOICN
包装: 带卷 (TR)
NCP1230
HV
+
V out
+
CBulk
1
2
3
4
8
7
6
5
PFC_V CC
OVP
1
2
3
4
8
7
6
5
OVP
GN
D
MC33262/33260
NCP1230
Ramp Comp
Rsense
10 k
V CC Cap
GND
Figure 1. Typical Application Example
PIN FUNCTION DESCRIPTION
Pin No.
1
2
3
4
5
6
7
8
Pin Name
PFC V CC
FB
CS/OVP
GND
DRV
V CC
NC
HV
Function
This pin provides
the bias voltage to
the PFC controller.
Feedback Signal
Current Sense
IC Ground
Driver Output
V CC Input
?
High ? Voltage
Pin Description
This pin is a direct connection to the V CC pin (Pin 6) via a low impedance switch. In
standby and during the startup sequence, the switch is open and the PFC V CC is
shut down. As soon as the aux. winding is stabilized, Pin 1 connects to the V CC pin
and provides bias to the PFC controller. It goes down in standby and fault conditions.
An optocoupler collector pulls this pin low to regulate. When the current setpoint
reaches 25% of the maximum peak, the controller skips cycles.
This pin incorporates three different functions: the current sense function, an internal
ramp compensation signal and a 3.0 V latch ? off level which latches the output off
until V CC is recycled.
?
With a drive capability of +500 mA / ? 800 mA, the NCP1230 can drive large Qg
MOSFETs.
The controller accepts voltages up to 18 V and features a UVLO turn ? off threshold of
7.7 V typical.
?
This pin connects to the bulk voltage and offers a lossless startup sequence. The
charging current is high enough to support the bias needs of a PWM controller
through Pin 1.
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