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参数资料
| 型号： | NCP1271ADAPGEVB |
| 厂商： | ON Semiconductor |
| 文件页数： | 13/21页 |
| 文件大小： | 0K |
| 描述： | EVAL BOARD FOR NCP1271ADAPG |
| 设计资源： | NCP1271 Adapter EVB BOM NCP1271ADAPGEVB Gerber Files NCP1271EVB Schematic |
| 标准包装： | 1 |
| 主要目的： | AC/DC，主面 |
| 输出及类型： | 1，隔离 |
| 输出电压： | 19V |
| 电流 - 输出： | 3A |
| 输入电压： | 85 ~ 265VAC |
| 稳压器拓扑结构： | 回扫 |
| 频率 - 开关： | 65kHz |
| 板类型： | 完全填充 |
| 已供物品： | 板 |
| 已用 IC / 零件： | NCP1271 |
| 其它名称： | NCP1271ADAPGEVBOS |
NCP1271
Soft ? Start Operation
Figures 28 and 29 show how the soft ? start feature is
included in the pulse ? width modulation (PWM)
comparator. When the NCP1271 starts up, a soft ? start
voltage V SS begins at 0 V. V SS increases gradually from 0 V
to 1.0 V in 4.0 ms and stays at 1.0 V afterward. This voltage
V SS is compared with the divided ? by ? 3 feedback pin
voltage (V FB /3). The lesser of V SS and (V FB /3) becomes the
modulation voltage V PWM in the PWM duty cycle
generation. Initially, (V FB /3) is above 1.0 V because the
output voltage is low. As a result, V PWM is limited by the
soft start function and slowly ramps up the duty cycle (and
therefore the primary current) for the initial 4.0 ms. This
Current ? Mode Pulse ? Width Modulation
The NCP1271 uses a current ? mode fixed ? frequency
PWM with internal ramp compensation. A pair of current
sense resistors R CS and R ramp sense the flyback drain
current I D . As the drain current ramps up through the
inductor and current sense resistor, a corresponding voltage
ramp is placed on the CS pin (pin 3). This voltage ranges
from very low to as high as the modulation voltage V PWM
(maximum of 1.0 V) before turning the drive off. If the
internal current ramp is ignored (i.e., R ramp ≈ 0) then the
maximum possible drain current I D(max) is shown in
Equation 2. This sets the primary current limit on a cycle
by cycle basis.
provides a greatly reduced stress on the power devices
during startup.
ID(max) +
1V
RCS
(eq. 2)
V SS
V FB / 3
0
1
?
+
I ramp
V bulk
S
V PWM
Figure 28. V PWM is the lesser of V SS and (V FB /3)
Soft ? start voltage, V SS
1V
PWM
Output
Q R
80%
max duty
Clock
180ns V CS
LEB
V PWM
(1V max. signal)
1
0
3
CS R ramp I D
R CS
Figure 30. Current ? Mode Implementation
4 ms
Feedback pin voltage divided ? by ? 3, V FB /3
1V
time
PWM
Output
V PWM
V CS
time must be less than130 ms
to prevent fault condition
Pulse Width Modulation voltage, V PWM
1V
time
clock
Figure 31. Current ? Mode Timing Diagram
The timing diagram of the PWM is in Figure 31. An
internal clock turns the Drive Output (Pin 5) high in each
4 ms
Drain Current, I D
4 ms
time
time
switching cycle. The Drive Output goes low when the CS
(Pin 3) voltage V CS intersects with the modulation voltage
V PWM . This generates the pulse width (or duty cycle). The
maximum duty cycle is limited to 80% (typically) in the
output RS latch.
Figure 29. Soft ? Start (Time = 0 at V CC = V CC(on) )
http://onsemi.com
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相关代理商/技术参数 |
参数描述 |
|---|---|
| NCP1271ADAPGEVB | 制造商:ON Semiconductor 功能描述:57 W Adapter Eval. Board |
| NCP1271D100R2G | 功能描述:电流型 PWM 控制器 ANA PMW CONTROLLER RoHS:否 制造商:Texas Instruments 开关频率:27 KHz 上升时间: 下降时间: 工作电源电压:6 V to 15 V 工作电源电流:1.5 mA 输出端数量:1 最大工作温度:+ 105 C 安装风格:SMD/SMT 封装 / 箱体:TSSOP-14 |
| NCP1271D100R2GH | 制造商:Rochester Electronics LLC 功能描述: 制造商:ON Semiconductor 功能描述: |
| NCP1271D65R2G | 功能描述:电流型 PWM 控制器 ANA PMW CONTROLLER RoHS:否 制造商:Texas Instruments 开关频率:27 KHz 上升时间: 下降时间: 工作电源电压:6 V to 15 V 工作电源电流:1.5 mA 输出端数量:1 最大工作温度:+ 105 C 安装风格:SMD/SMT 封装 / 箱体:TSSOP-14 |
| NCP1271D65R2GH | 制造商:Rochester Electronics LLC 功能描述: 制造商:ON Semiconductor 功能描述: |
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