参数资料
| 型号： | NCP1337DR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 11/15页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR FLYBK ISO PWM 7SOIC |
| 标准包装： | 1 |
| PWM 型： | 电流模式 |
| 输出数： | 1 |
| 频率 - 最大： | 130kHz |
| 电源电压： | 11 V ~ 20 V |
| 降压： | 无 |
| 升压： | 无 |
| 回扫： | 是 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 是 |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽）7 引线 |
| 包装： | 标准包装 |
| 其它名称： | NCP1337DR2GOSDKR |
NCP1337
Soxyless
The “Valley point detection” is based on the observation
of the Power MOSFET Drain voltage variations. When the
transformer is fully demagnetized, the Drain voltage
evolution from the plateau level down to the V IN asymptote
is governed by the resonating energy transfer between the
L P transformer inductor and the global capacitance present
on the Drain. These voltage oscillations create current
oscillation in the parasitic capacitor across the switching
MOSFET (modelized by the Crss capacitance between
Gate and Drain): a negative current (flowing out of DRV
pin) takes place during the decreasing part of the Drain
oscillation, and a positive current (entering into the DRV
pin) during the increasing part.
The Drain valley corresponds to the inversion of the
current (i.e., the zero crossing): by detecting this point, we
always ensure a true valley turn ? on.
Isoxy
Crss
Lprim
Vswitch
T SWING
DRV
t
Figure 6. Soxyless Concept
Tswing + 0.5 Fres + p * Lp * Cdrain
The current in the Power MOSFET gate is:
Igate = Vringing/Zc (with Zc the capacitance impedance)
so
Igate = Vringing S (2 S p S Fres S Crss)
The magnitude of this gate current depends on the
MOSFET, the resonating frequency and the voltage swing
present on the Drain at the end of the plateau voltage.
The dead time T SWING is given by the equation:
(eq. 1)
(where L P is the primary transformer inductance and
C DRAIN the total capacitance present on the MOSFET
Drain. This capacitance includes the snubber capacitor if
any, the transformer windings stray capacitance plus the
parasitic MOSFET capacitances C OSS and C RSS ).
Internal Feedback Circuitry
To simplify the implementation of a primary regulation,
it is necessary to inject a current into the FB pin (instead of
sourcing it out). But to have a precise primary regulation,
the voltage present on FB pin must be regulated. Figure 8
gives the FB pin internal implementation: the circuitry
combines the functions of a current to voltage converter
and a voltage regulator.
Vdd
FB
+
3V
+
-
Internal
Setpoint
20 kHz
Low ? pass Filter
Figure 7. Internal Implementation of FB Pin
http://onsemi.com
11
相关PDF资料 |
PDF描述 |
|---|---|
| NCP1338DR2G | IC REG CTRLR FLYBK ISO PWM 7SOIC |
| NCP1377BP | IC CTRLR PWM CM OVP UVLO 8DIP |
| NCP1378PG | IC REG CTRLR FLYBACK PWM 7-PDIP |
| NCP1379DR2G | IC CTLR QUASI CURRENT MODE 8SOIC |
| NCP1380DDR2G | IC REG CTRLR FLYBK ISO PWM 8SOIC |
相关代理商/技术参数 |
参数描述 |
|---|---|
| NCP1337PG | 功能描述:电流型 PWM 控制器 PWM CONTROLLER RoHS:否 制造商:Texas Instruments 开关频率:27 KHz 上升时间: 下降时间: 工作电源电压:6 V to 15 V 工作电源电流:1.5 mA 输出端数量:1 最大工作温度:+ 105 C 安装风格:SMD/SMT 封装 / 箱体:TSSOP-14 |
| NCP1338 | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:PWM Current-Mode Controller for Free Running Quasi-Resonant Operation |
| NCP1338DR2G | 功能描述:电流型 PWM 控制器 PWM CNTRL SOIC 8 RoHS:否 制造商:Texas Instruments 开关频率:27 KHz 上升时间: 下降时间: 工作电源电压:6 V to 15 V 工作电源电流:1.5 mA 输出端数量:1 最大工作温度:+ 105 C 安装风格:SMD/SMT 封装 / 箱体:TSSOP-14 |
| NCP1338PG | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:PWM Current-Mode Controller for Free Running Quasi-Resonant Operation |
| NCP1351 | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:Power Factor Controllers |
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