参数资料
型号: NCP1377D1R2G
厂商: ON Semiconductor
文件页数: 12/17页
文件大小: 0K
描述: IC CTRLR PWM SMPS CM UVLO 7SOIC
标准包装: 1
输出隔离: 隔离
频率范围: 100kHz
输入电压: 8.2 V ~ 18 V
工作温度: -40°C ~ 125°C
封装/外壳: 8-SOIC(0.154",3.90mm 宽)7 引线
供应商设备封装: 7-SOIC
包装: 剪切带 (CT)
其它名称: NCP1377D1R2GOSCT
NCP1377, NCP1377B
Vcc ON
Vcc off
Vcc
Vcc latch
Driving Pulses
Figure 28. Typical Waveforms in Short Circuit Conditions
15 ms. CV CC is calculated using the equation C +
D t · i
D V
Soft ? Start
The NCP1377 features an internal 1.0 ms Soft ? Start to
soften the constraints occurring in the power supply during
startup. It is activated during the power on sequence. As
soon as Vcc reaches Vcc ON , the peak current is gradually
increased from nearly zero up to the maximum clamping
level (e.g. 1.0 V). The Soft ? Start is also activated during
the overcurrent burst (OCP) sequence. Every restart
attempt is followed by a Soft ? Start activation. Generally
speaking, the Soft ? Start will be activated when Vcc ramps
up either from zero (fresh power ? on sequence) or 5.6 V, the
latchoff voltage occurring during OCP.
Calculating the Vcc Capacitor
The Vcc capacitor can be calculated knowing the IC
consumption as soon as Vcc reaches Vcc ON . Suppose that
a NCP1377 is used and drives a MOSFET with a 30 nC
total gate charge (Qg). The total average current is thus
made of Icc1 (1.0 mA) plus the driver current, Fsw x Qg or
1.8 mA. The total current is therefore 2.8 mA. The D V
available to fully startup the circuit (e.g. never reach the
7.5 V UVLO during power on) is 12.5 – 7.5 = 5.0 V. We
have a capacitor which then needs to supply the NCP1377
with 2.8 mA during a given time until the auxiliary supply
takes over. Suppose that this time was measured at around
or
C w 8.6 m F . Select a 22 m F/16 V and this will fit. During
the latchoff phase, the current consumption drops to ICC3
or 220 m A. We can now calculate how long this latchoff
phase will last: (7.5–5.6) x 22 m /220 u = 190 ms.
Protecting Pin 8 Against Negative Spikes
As any CMOS controller, NCP1377 is sensitive to
negative voltages that could appear on its pins. To avoid
any adverse latchup of the IC, we strongly recommend to
insert a resistor R HV in series with pin8. This resistor
prevents from adversely latching the controller in case of
negative spikes appearing on the bulk capacitor during the
power ? off sequence. A typical value of 6.8 k W /0.5 W is
suitable. This resistor does not dissipate any power since it
only sees current during the startup sequence and during
overload. Calculations actually involve the minimum
voltage on pin8 necessary to fully activate the current
source. This minimum voltage being 40 V, therefore R HV
shall be less than: (Vbulk min –40)/6.0 m.
Operating Shots
Following are some oscilloscope shots captured at
Vin = 120 VDC with a transformer featuring a 800 m H
primary inductance.
http://onsemi.com
12
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