参数资料
型号: NCP1378PG
厂商: ON Semiconductor
文件页数: 12/15页
文件大小: 0K
描述: IC REG CTRLR FLYBACK PWM 7-PDIP
产品变化通告: Product Obsolescence 01/Jul/2009
标准包装: 1
PWM 型: 电流模式
输出数: 1
频率 - 最大: 100kHz
电源电压: 8.2 V ~ 18 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: 0°C ~ 125°C
封装/外壳: 8-DIP(0.300",7.62mm),7 引线
包装: 剪切带 (CT)
其它名称: NCP1378PGOSCT
NCP1378
Vcc ON
Vcc OFF
Vcc
Vcc latch
Driving Pulses
Figure 27. Typical Waveforms in Short Circuit Conditions
Soft--Start
The NCP1378 features an internal 1.0 ms Soft-- Start to
soften the constraints occurring in the power supply during
startup. It is activated during the power on sequence. As
soon as V CC reaches VCC ON , the peak current is gradually
increased from nearly zero up to the maximum clamping
level (e.g. 1.0 V). The Soft-- Start is also activated during
the overcurrent burst (OCP) sequence. Every restart
attempt is followed by a Soft-- Start activation. Generally
speaking, the Soft-- Start will be activated when V CC ramps
up either from zero (fresh power–on sequence) or 5.5 V, the
latch–off voltage occurring during OCP.
Calculating the Vcc Capacitor
The V CC capacitor can be calculated knowing the IC
consumption as soon as V CC reaches VCC ON . Suppose that
a NCP1378 is used and drives a MOSFET with a 30 nC
Protecting Pin 8 Against Negative Spikes
As any CMOS controller, NCP1378 is sensitive to
negative voltages that could appear on its pins. To avoid
any adverse latchup of the IC, we strongly recommend to
insert a resistor in series with pin8. This resistor prevents
from adversely latching the controller in case of negative
spikes appearing on the bulk capacitor during the
power-- off sequence. A typical value of 6.8 k Ω /0.5 W is
suitable. This resistor does not dissipate any power since it
only sees current during the startup sequence and during
overload.
Operating Shots
Below are some oscilloscope shots captured at
Vin = 120 VDC with a transformer featuring a 800 m H
primary inductance.
CV CC is calculated using the equation C =
or C ≥
total gate charge (Qg). The total average current is thus
made of ICC1 (1.0 mA) plus the driver current, Fsw x Qg
or 1.8 mA. The total current is therefore 2.8 mA. The Δ V
available to fully startup the circuit (e.g. never reach the
7.5 V UVLO during power on) is 8.4 – 7.5 = 0.9 V. We have
a capacitor that then needs to supply the NCP1378 with
2.8 mA during a given time until the auxiliary supply takes
over. Suppose that this time was measured at around 10 ms.
Δ t · i
Δ V
31.1 m F. Select a 47 m F/25 V and this will fit. During the
latchoff phase, the current consumption drops to 220 m A.
We can now calculate how long this latchoff phase will last:
(7.5–5.5) x 47 m /220 u = 427 ms.
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