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参数资料
| 型号： | NCP1380ADR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 22/26页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR FLYBK ISO PWM 8SOIC |
| 产品变化通告： | NCP1380 Pulldown Resistor Spec Change 01/Jul/2011 |
| 标准包装： | 2,500 |
| PWM 型： | 电流模式 |
| 输出数： | 1 |
| 电源电压： | 9 V ~ 28 V |
| 降压： | 无 |
| 升压： | 无 |
| 回扫： | 是 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 是 |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 包装： | 带卷 (TR) |
NCP1380
OVER POWER COMPENSATION
The over power compensation is achieved by monitoring
the signal on ZCD pin (pin 1). Indeed, a negative voltage
applied on this pin directly affects the internal voltage
reference setting the maximum peak current (Figure 40).
When the power MOSFET is turned?on, the auxiliary
winding voltage becomes a negative voltage proportional to
Rz cd
Ropu
CS
the input voltage. As the auxiliary winding is already
connected to ZCD pin for the valley detection, by selecting
the right values for R opu and R opl , we can easily perform
over power compensation.
ZCD/OPP
1
ESD
OPP
IpFlag
Au x
Ropl
protection
V IL IMIT
+
Vt h
?
leakage blanking
Demag
DRV
Tblank
Figure 40. Over Power Compensation Circuit
To ensure optimal zero?crossing detection, a diode is
needed to bypass R opu during the off?time.
If we apply the resistor divider law on the pin 1 during the
on?time, we obtain the following relationship:
Design example:
V aux = 18 V
V d = 0.6 V
N p,aux = 0.18
Where:
R ZCD ) R opu
R opl
+*
N p,aux V in * V OPP
V OPP
(eq. 2)
If we want at least 8 V on ZCD pin, we have:
R ZCD V aux * V d * V ZCD
+
R opl V ZCD
(eq. 5)
N p,aux is the auxiliary to primary turn ration: N p,aux = N aux
/ N p
+
18 * 0.6 * 8
8
[ 1.2
V in is the DC input voltage
V OPP is the negative OPP voltage
By selecting a value for R opl , we can easily deduce R opu
using Equation 2. While selecting the value for R opl , we
must be careful not choosing a too low value for this resistor
in order to have enough voltage for zero?crossing detection
during the off?time. We recommend having at least 8 V on
We can choose: R ZCD = 1 k W and R opl = 1 k W .
For the over power compensation, we need to decrease the
peak current by 37.5% at high line (370 Vdc). The
corresponding OPP voltage is:
V OPP + 0.375 V ILIM + ?300 mV (eq. 6)
Using Equation 2, we have:
V ZCD + V aux * V d
ZCD pin, the maximum voltage being 10 V.
During the off?time, ZCD pin voltage can be expressed as
follows:
R opl
(eq. 3)
R ZCD ) R opl
R ZCD ) R opu
R opt
+*
+
N p,aux V lin * V OPP
V OPP
?0.18 370 * (?0.3)
(?0.3)
+ 221
(eq. 7)
We can thus deduce the relationship between R opl and
R ZCD :
Thus,
R opu + 221 Ropl * R ZCD + 221
1k * 1k + 220 k W
R ZCD
R opl
+
V aux * V d * V ZCD
V ZCD
(eq. 4)
(eq. 8)
http://onsemi.com
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