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| 型号： | NCP1651DR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 30/32页 |
| 文件大小： | 779K |
| 描述： | IC PFC CONTROLLER CCM/DCM 16SOIC |
| 标准包装： | 1 |
| 模式： | 连续导电（CCM），间歇导电（DCM） |
| 频率 - 开关： | 25kHz ~ 250kHz |
| 电流 - 启动： | 8.5mA |
| 电源电压： | 10 V ~ 18 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 16-SOIC |
| 包装： | 标准包装 |
| 其它名称： | NCP1651DR2GOSDKR |
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NCP1651
http://onsemi.com
30
Optocoupler Transfer
Theoptocouplerisusedtoallowforgalvanicisolationfor
the error signal fromthe secondary toprimary sidecircuits.
The gain is based on the Current Transfer Ratio of the
device.Thiscanchangeovertemperatureandtime,butwill
not result in a large change in dB.
Therecommendedcapacitoratpin8is0.022mF.Ifalarger
capacitor is used, the pole may become low enough that it
willhaveaneffectonthegainphaseplotsneartheunitygain
crossoverfrequency.Inthiscaseandadditionalzerowillbe
required in the error amplifier bias circuitry.
Reference Signal
The error signal is transmitted to the primary side circuit
via. the optocoupler, is converted to a current by the V- -I
converter and is then used as an input to the reference
multiplier. The gain of this block is dependent on the AC
input voltage, because of the multiplier which requires two
inputs for one output.
Modulator and Output Stage
The modulator receives an input from the reference
multiplier and forces the current to follow the shape and
amplitude. The is an internal loop within thissection due to
thecurrentsenseamplifier.Basedontheassumptionslisted
in the introduction to this analysis, this is not analyzed
separately.
The equation for the gain is good for frequencies below
thepole.Thereisasinglepoleduetotheoutputfilter.Since
theNCP1651isacurrentmodeconverter,theinductorisnot
part of the output pole as can be seen in that equation.
The modulator and output stage transfer functions have
been split into two sets of equations. The first defines the
relationship between the input current and AC reference
signal, and the later, define the output stage gain and pole.
Due to the nature of a flyback transformer, the gain of the
output stage is dependant on the duty cycle (t
on
/T). For
continuous mode operation, the on- -time is:
t
on
=
T
N
S
N
P
?/DIV>
2
R
?/DIV>
V
rms
V
out
+ 1
Calculating the Loop Gain
At this point in the design process, all of the parameters
involved in this calculation have been determined with the
exception of the pole- -zero pair on the output of the voltage
error amplifier.
All equations give gains in absolute numbers. It is
necessary to convert these to the decibel format using the
following formula:
A(dB) = 20 Log
10
(A)
For example, the voltage divider would be:
A =
5.6 k
560 k + 5.6 k
= 0.0099
A(dB) = 20 Log
10
0.0099 = - -40 dB
Thegainoftheloopwillvaryastheinputvoltagechanges.
It is recommended that the compensation for the error
amplifierbecalculatedunderhighline,fullloadconditions.
Thisshould be the greatest bandwidth that the unit will see.
By necessity, the unity gain (0 dB) loop bandwidth for a
PFC unit, must be less than the line frequency. If the
bandwidth approaches or exceeds the line frequency, the
voltage error amplifier signal will have frequency
components in its output that are greater than the line
frequency. These components will cause distortion in the
outputofthereferenceamplifier,whichisusedtoshapethe
current waveform. This in turn will cause distortion in the
current and reduce the power factor.
Typically the maximum bandwidth for a 60 Hz PFC
converter is 10 Hz, and slightly less for a 50 Hz system. This
canbeadjustedtomeettheparticularrequirementsofasystem.
The unity gain bandwidth is determined by the frequency at
which the loop gain passes through the 0 dB level.
For stability purposes, the gain should pass through 0 dB
withaslopeof- -20dBforapproximatelyondecadeoneither
sideoftheunitygainfrequency.Thisassuresaphasemargin
of greater than 45?
Thegaincanbecalculatedgraphicallyusingtheequations
of Figure 18 as follows:
Divider:
Calculate V?V
o
in dB, this value is constant so it
will not change with frequency.
OptocouplerTransfer:
CalculateV
fb
/V
ea
usingtheequation
provided. Convert this value into dB.
ReferenceSignal:
CalculateV
ref
/V
fb
usingthepeaklevelof
the AC input signal at high line that will be seen on pin 9.
Convert this to dB. This is also a constant value.
Modulator and Output Stage:
Calculate the gain in dB for
DI
o
/DV
ref
for the modulator, and also the gain in dB for the
outputstage(DV
out
/DI
in
).Calculatethepolefrequency.The
gainwillbeconstantforallfrequencieslessthanf
p
.Starting
at the pole frequency, this gain will drop off at a rate of
20 dB/decade.
Plot the sum of all of the calculated values. Be sure to
include the output pole. It should resemble the plot of
Figure 45. This plot shows a gain of 34 dB until the pole of
the output filter is reached at 3 Hz. After that, the gain is
reduced at a rate of 20 dB/decade.
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