参数资料
型号: NCP4302BDR2G
厂商: ON Semiconductor
文件页数: 13/16页
文件大小: 0K
描述: IC REG CTRLR FLYBK ISO PWM 8SOIC
标准包装: 1
PWM 型: 控制器
输出数: 1
频率 - 最大: 250kHz
电源电压: 9.2 V ~ 28 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
包装: 剪切带 (CT)
其它名称: NCP4302BDR2GOSCT
NCP4302
TX1
operate in CCM, CRM, or QR modes. The next sections
C out
R bias
cover the losses associated for each of the three operating
modes.
Discontinuous Conduction Mode
R comp C comp
TL431
R upper
R lower
The basic switching waveforms for the Flyback converter
operating in DCM are shown in Figure 31. When the
primary side MOSFET (SP in Figure 30) is turned ? on
current flows is the transformer primary and ramps up from
zero to I peak . When the primary side MOSFET (SP)
turns ? off, the polarity of the transformer reverses and the
energy stored in the transformer is transferred to the
secondary. When the energy transfer from the transformer
primary to the transformer secondary begins, (prior to the
Figure 29. Typical Secondary Side Regulator
When the TL431 is being used to regulate the output of a
power supply it is typically configured as shown in
Figure 29. Where the output from the power supply is
sensed and divided down with a resistive divider made up of
R upper and R lower . The center point of the divider is
connected to the reference pin of the NCP4302. The divider
ratio scales down the output voltage to match the reference
voltage, 2.5 V or 1.25 V.
secondary side synchronous MOSFET turning ? on) the
secondary current flows through the internal body diode
synchronous rectifiers MOSFETs (SS) and (SSD). To
minimize the losses in the SSD, the propagation delay (t p1 )
must be low. Otherwise, there will be high losses associated
with the secondary peak current and the SSD forward
voltage drop (NCP4302 has a typical propagation delay of
50 ns).
P Tsecondary + P on ) P SW ) P diode (eq. 1)
V REF + V out @
R lower
R lower ) R upper
I out +
I sec,pk
2
@ (1 * D on )
(eq. 2)
The R bias resistor in Figure 29 sets the current through the
TL431, which must be greater than 0.5 mA to guarantee its
performance under all operating conditions.
I sec,rms + I sec,pk @
Combining equations 2 and 3,
1 * D on
3
(eq. 3)
4 @ I out 2
I sec,rms 2 +
4 @ I out 2
P on + @ R DS(on)
V in
SSD
C out
V out
3 @ (1 * D on )
3 @ (1 * D on )
(eq. 4)
(eq. 5)
2
P SW + 1 @ C OSS @ V S 2 @ f
(eq. 6)
SP
SS
Where:
P diode + V F @ I out @ t delay
(eq. 7)
I out is the dc output current
V F is
V S + n in ) V out
Figure 30. Synchronous Rectifier
Using Synchronous Rectification
For a flyback converter to operate correctly with
synchronous rectification there must be a delay between the
time when the primary side MOSFET (SP Figure 30) and the
secondary side Synchronous rectification MOSFETs (SS
Figure 29) are conducting current. The NCP4302 can
D is the duty cycle
R DS(on) is the on resistance of the MOSFET
V
n is the transformer turns ratio
T delay is the delay from the sync to the drive output
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