参数资料
| 型号： | NCP4326DR2 |
| 厂商： | ON Semiconductor |
| 文件页数： | 26/29页 |
| 文件大小： | 0K |
| 描述： | IC SECONDARY CTLR SW PS 16-SOIC |
| 产品变化通告： | Discontinuation 30/Jun/2006 |
| 标准包装： | 2,500 |
| 应用： | 次级控制器，准谐振切换模式电源 |
| 输入电压： | 15V |
| 输出数： | 3 |
| 工作温度： | 0°C ~ 105°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 16-SOIC |
| 包装： | 带卷 (TR) |
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NCP4326
Standby Pin Feature Description
The standby pin enables or disables the controller in order
to save some power when the power supply is in standby
mode. In standby mode all the internal power supplies and
references are shut down, except the V DD1 and the voltage
reference connected to the shunt regulator. The shunt
regulator bloc works during the standby mode for supplying
the feedback to the primary controller.
When the standby pin is released the both drivers are kept
in OFF state during T stby_off time to prevent any parasitic
switches on the driver before the internal power ON of the
controller is fully finished.
Practically the internal standby signal for the driver is
delayed and in the mean time the internal power waking up
is done.
V CC
V CC
V CC
UVLO
Vcc OK
V DD1 V DD
VOLTAGE
REFERENCE
*V DD is not available in standby mode
**V DD1 is available all the time
2V5
1V25
V DD1
STBY
2V5
V DD1
+
?
SoftStart
Vcc OK
STBY
DELAY
V CC
GND
DRV1
GND
Figure 49. Standby Delay Definition
Synchronization Pin
The NCP4326 needs to be synchronized with the primary
controller, a dedicated pin ensures this function just by
sensing a secondary winding voltage and filtering it.
The RC network (Rsync1 and Csync) filters the secondary
winding and Rsync2 limits the current through the internal
zener diode when the voltage exceeds the zener clamp level
or when the zener conduct in forward mode (when the
voltage winding is negative).
NCP4326
V DD
ICt
Mag
Ct
Rsync1
Rsync2
Csync
Sync
V DD
?
+
Enable
1V6
4V0
Ct
D1
GND
GND
GND
GND GND
GND
Flyback transformer
Figure 50. Synchronization Pin Wiring
http://onsemi.com
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