参数资料
| 型号： | NCP4350DR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 6/10页 |
| 文件大小： | 0K |
| 描述： | IC SUPERVISOR DESKTOP PS 16-SOIC |
| 标准包装： | 2,500 |
| 类型： | 多压监控器 |
| 监视电压数目： | 4 |
| 电压 - 阀值： | 3.3V，5V，12V，12V |
| 工作温度： | 0°C ~ 105°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 16-SOIC |
| 包装： | 带卷 (TR) |
NCP4350
ELECTRICAL CHARACTERISTICS (V CC = 12V, for typical values T J = 25 ° C, for min/max values, T J = 0 ° C to +105 ° C,
Max T J = 150 ° C, R I =33 k W , unless otherwise noted.)
Symbol
Rating
Min
Typ
Max
Unit
Delay Characteristics
Tdly PSONB
Time delay On/Off PSONB (PGO ↓ ) 50% of the pull up voltage
24
38
62
msec
(PSONB>V OHPSONB, R pull-up FPOB =1k, V pull-up = +5 V)
Tdly FOP
Tdly OV
Time delay between PGO ↓ and FPOB ↑
Time delay from an OV to FPOB ↑ and PGO ↓ 50% of the pull up
2.0
9.0
4.0
14
8.0
19
msec
m sec
voltage (PSONB<V OLPSONB, R pull-up FPOB =1k, V pull-up = +5 V)
Tdly UV
Time delay from an UV to FPOB ↑ and PGO ↓ 50% of the pull up
0.5
1.0
2.0
msec
voltage (PSONB<V OLPSONB, R pull-up FPOB =1k, V pull-up = +5 V)
Tdly PGO
Time delay PGI ↑ to PGO ↓
100
300
438
msec
(PSONB<V OLPSONB, R pull-up PGO =1k, V pull-up = +5 V)
Tdlly START
Tdelay OTP
Time delay on start-up UV, OC, OTP lockout
Time delay from an OTP ↑ to FPOB ↑ and PGO ↓ 50% of the pull up
45
0.5
75
1.0
130
2.0
msec
msec
voltage (PSONB<V OLPSONB, R pull-up FPOB and PGO =1k, V pull-up
= +5 V) OTP ↓
Tdly OCP
Time delay from an OCP to FPOB ↑ and PGO ↓ 50% of the pull up
11
20
32
msec
voltage (PSONB<V OLPSONB, R pull up FPOB and PGO =1k, V pull-up
= +5 V)
Tdly PGI
Time delay from PSONB ↓ to PGO ↑ 10-90% of the pull up voltage
124
338
500
msec
(PGI>V THPGI, R pull-up PGO=1k, V pull-up = +5V)
Overtemperature Input
V OTP
Voltage threshold for OTP ↓ (PGO ↓ , FPOB ↑ , PSONB < V OL PSONB ,
1.18
1.25
1.32
V
R pull-up FPOB and PGO =1k, V pull-up = +5 V)
V OTPHYS
Overtemperature Comparator Hysteresis (Note 3)
50
mV
3. Guaranteed by design.
http://onsemi.com
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