参数资料
| 型号： | NCP5201MNR2 |
| 厂商： | ON Semiconductor |
| 文件页数： | 7/9页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR PWR DDR DUAL 5X6 18-DFN |
| 产品变化通告： | Product Obsolescence 30/Sept/2009 |
| 标准包装： | 2,500 |
| 应用： | 控制器，DDR |
| 输入电压： | 9.2 V ~ 12 V |
| 输出数： | 2 |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 18-VFDFN 裸露焊盘 |
| 供应商设备封装： | 18-DFN（5x6） |
| 包装： | 带卷 (TR) |
| 其它名称： | NCP5201MNR2OS |
NCP5201
VDDQ Regulator in Standby Mode (S3)
An internal P?Channel power FET switching at 500 kHz
(doubled frequency), with peak current limit preset at
2.0 A, provides nonsynchronous switch?mode control
while in the S3 state. In this mode, the internal P?Channel
power FET derives its source from the 5 VSTBY pin. The
2.0 A peak current limit is designed to yield an average
output current limit of 700 mA when using a 1.7 m H output
inductor. When using this value inductor, the regulator will
Table 2. States, Operation and Output Pin Conditions
Operating Conditions
operate in discontinuous conduction mode (DCM) in the S3
state. And, switching in doubled frequency (500 kHz) is to
reduce the peak conduction current. In this operating mode,
the body diode of the external synchronous MOSFET acts
as a flywheel diode and the MOSFET is never turned on.
TGDDQ and BGDDQ are set Low to disable the external
switches. Nominal output voltage and the PWM control
scheme of Normal mode still apply.
Output Pin Conditions
Operation Mode
S0
S3
S5
VDDQ
Normal
Standby
H?Z
VTT
Normal
H?Z
H?Z
TGDDQ
Normal
Low
Low
BGDDQ
Normal
Low
Low
PWRGD
H?Z
Low
Low
Fault Protection of VDDQ Regulator
During state S0, external resistor (RL1) sets current limit
for the high?side switch. An internal 10 m A current sink at
pin OCDDQ establishes the voltage drop across this
resistor, which is compared to the voltage at the SDDQ pin
when the high?side drive is high, and after a fixed period
(500 ns) of blanking time to avoid false current limit
triggering. When the voltage at SDDQ is lower than that at
OCDDQ, an overcurrent condition occurs, both FETs are
latched?off until the IC goes into S5 then S0, VDDQ will
soft?start again. This protects against a short?to?ground
condition on SDDQ or VDDQ.
During state S3, the internal P?Channel power FET is
activated and switching. If the conduction current of the
FET is higher than 2.0 A after a fixed period ( X 500 ns) of
blanking time, an overcurrent condition occurs, and the
FET is turned off for the remainder of that switching cycle.
Feedback Compensation of VDDQ Regulator
The compensation network is shown in Figure 1.
VTT Active Terminator in Normal Mode (S0)
The VTT regulator is a two?quadrant linear regulator
with internal N?channel power FETs to provide transient
current sink and source capability up to 1.8 A. This output
is activated in normal mode in state S0 when VDDQ is in
regulation. It is in standby mode in state S3. When in
normal mode and VTT is in regulation, signal INREGVTT
will go HIGH to notify the control logic block. The input
power path is from VDDQ. Gate drive power is derived
from VSTBY. VTT is stable with any value of output
capacitor greater than 220 m F, and is insensitive to ESR
value ranging 2 m W to 400 m W .
VTT Active Terminator in Standby Mode (S3)
VTT output is high?impedance in S3 mode.
Fault Protection of VTT Active Terminator
To provide protection for the internal FETs, bidirectional
current limit is implemented, preset at 2.3 A magnitude.
Thermal Consideration of VTT Active Terminator
The VTT terminator is designed to handle large transient
output currents. If large currents are required for very long
durations, then care should be taken to ensure the
maximum junction temperature is not exceeded. The 5 × 6
QFN?18 has a thermal resistance 35 ° C/W (dependent on
air flow, grade of copper and number of VIAs).
Undervoltage Monitor
The IC monitors VSTBY and VCC. If VSTBY is higher
than its preset threshold (derived from VREF, with
hysteresis), _VSTGD is set HIGH. Operation is identical
for VCC and _12 VGD. The CONTROL LOGIC accepts
both _VSTGD and _12 VGD to determine the state of the
IC.
http://onsemi.com
7
相关PDF资料 |
PDF描述 |
|---|---|
| HSM24DRYN-S13 | CONN EDGECARD 48POS .156 EXTEND |
| HBC35DRTI-S13 | CONN EDGECARD 70POS .100 EXTEND |
| HMM24DRYN-S13 | CONN EDGECARD 48POS .156 EXTEND |
| GSC26DRYI-S13 | CONN EDGECARD 52POS .100 EXTEND |
| P1812R-334K | INDUCTOR POWER 330UH SMD |
相关代理商/技术参数 |
参数描述 |
|---|---|
| NCP5201MNR2G | 功能描述:DC/DC 开关控制器 DDR Dual Power RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
| NCP5203 | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:2-in-1 DDR Power Controller |
| NCP5203/D | 制造商:未知厂家 制造商全称:未知厂家 功能描述:2-in-1 DDR Power Controller |
| NCP5203MNR2 | 功能描述:DC/DC 开关控制器 2-in-1 DDR Power RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
| NCP5203MNR2G | 功能描述:DC/DC 开关控制器 2-in-1 DDR Power RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
发布紧急采购，3分钟左右您将得到回复。