参数资料
型号: NCP5210MNR2G
厂商: ON Semiconductor
文件页数: 12/18页
文件大小: 0K
描述: IC CTLR PWM/DDR DUAL BUCK 20-DFN
产品变化通告: Product Obsolescence 08/Apr/2011
标准包装: 1
应用: 控制器,DDR
输入电压: 4.5 V ~ 13.2 V
输出数: 3
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 20-VFDFN 裸露焊盘
供应商设备封装: 20-QFN(6x5)
包装: 剪切带 (CT)
其它名称: NCP5210MNR2GOSCT
NCP5210
5VSTBY
or
5VDUAL
12 V
5V
BUF_CUT
SS pin
DDQ?S0
VTT
MCH
Switching
Frequency
Doubles
State
1
2
3
4
5
6
7
8
9
10
11
12 13
14
15 16
17
S0
S3
S0
S5
2. 5VSTBY or 5VSTB is the Ultimate Chip Enable. This supply has to be up first to ensure gates are in known state.
3. 12 V and 5 V supplies can ramp in either order.
4. DDQ will ramp with the tracking of SS pin, timing is 1.2 * C SS / 4 m (sec).
5. DDQ SS is completed, then SS pin is released from DDQ. SS pin is shorted to ground.
5. MCH ramps with the tracking of SS pin ramp, timing is 0.8 * C SS / 8 m (sec). VTT rises.
6. MCH SS is completed, then SS pin is released from MCH. SS pin is shorted to ground. S0 Mode.
7. S3 MODE ? BUF_CUT = H.
8. VTT and MCH will be turned off.
9. 12 V and 5 V ramps to 0 V.
10. Standard S3 Mode.
11. 12 V and 5 V ramp back to regulation.
12. BUF_CUT goes LOW.
13. 12 V UVLO = L and BUF_CUT = L. MCH ramps with SS pin, timing is 0.8 * C SS / 8 m (sec). VTT rises.
14. S0 Mode.
15. Prepare S5 Mode ? BUF_CUT = L, and 12VUVLO = H or 5VUVLO = H.
16. DDQ, VTT, and MCH Turned OFF.
17. S5 Mode.
Figure 16. NCP5210 Timing Diagram
http://onsemi.com
12
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