参数资料
型号: NCP5220AMNR2G
厂商: ON Semiconductor
文件页数: 5/18页
文件大小: 0K
描述: IC CTLR PWM DUAL BUCK PWR 20-DFN
产品变化通告: Product Obsolescence 21/Jan/2010
标准包装: 1
应用: 控制器,DDR
输入电压: 5 V ~ 12 V
输出数: 2
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 20-VFDFN 裸露焊盘
供应商设备封装: 20-QFN(6x5)
包装: 剪切带 (CT)
其它名称: NCP5220AMNR2GOSCT
NCP5220
ELECTRICAL CHARACTERISTICS (5VDUAL = 5.0 V, BOOT = 12 V, T A = 0 ° C to 70 ° C, L = 1.7 m H, COUT1 = 3770 m F,
COUT2 = 470 m F, COUT3 = NA, CSS = 33 nF, R1 = 2.166 k W , R2 = 2.0 k W , RZ1 = 20 k W , RZ2 = 8.0 W , CP1 = 10 nF,
CZ1 = 6.8 nF, CZ2 = 100 nF, RM1 = 2.166 k W , RM2 = 2.0 k W , RZM1 = 20 k W , RZM2 = 8.0 W , CPM1 = 10 nF, CZM1 = 6.8 nF,
CZM2 = 100 nf for min/max values unless otherwise noted). Duplicate component values of MCH regulator from DDQ.
Characteristic
Symbol
Test Conditions
Min
Typ
Max
Unit
SUPPLY VOLTAGE
5VDUAL Operating Voltage
BOOT Operating Voltage
V5VDUAL
VBOOT
4.5
5.0
12.0
5.5
13.2
V
V
SUPPLY CURRENT
S0 Mode Supply Current from 5VDUAL
I5VDL_S0
SLP_S5 = HIGH, SLP_S3 = HIGH,
10
mA
BOOT = 12 V, TG_1P5 and BG_1P5
Open
S3 Mode Supply Current from 5VDUAL
I5VDL_S3
SLP_S5 = HIGH, SLP_S3 = LOW,
5.0
mA
TG_1P5 and BG_1P5 Open
S5 Mode Supply Current from 5VDUAL
I5VDL_S5
SLP_S5 = LOW, BOOT = 0 V,
1.0
mA
TG_1P5 and BG_1P5 Open
S0 Mode Supply Current from BOOT
IBOOT_S0
SLP_S5 = HIGH, SLP_S3 = HIGH,
25
mA
BOOT = 12 V, TG_1P5 and BG_1P5
Open
S3 Mode Supply Current from BOOT
IBOOT_S3
SLP_S5 = HIGH, SLP_S3 = LOW,
25
mA
TG_1P5 and BG_1P5 Open
UNDERVOLTAGE?MONITOR
5VDUAL UVLO Upper Threshold
V5VDLUV+
4.4
V
5VDUAL UVLO Hysteresis
V5VDLhys
250
400
550
mV
BOOT UVLO Upper Threshold
BOOT UVLO Hysteresis
VBOOTUV+
VBOOThys
1.0
10.4
V
V
THERMAL SHUTDOWN
Thermal Shutdown
Thermal Shutdown Hysteresis
Tsd
Tsdhys
(Note 3)
(Note 3)
145
25
° C
° C
DDQ SWITCHING REGULATOR
FBDDQ Feedback Voltage, Control Loop in
VFBQ
T A = 25 ° C
1.178
1.190
1.202
V
Regulation
T A = 0 ° C to 70 ° C
1.166
1.214
Feedback Input Current
IDDQFB
V(FBDDQ) = 1.3 V
1.0
m A
Oscillator Frequency in S0 Mode
Oscillator Frequency in S3 Mode
FDDQS0
FDDQS3
217
434
250
500
283
566
KHz
KHz
Oscillator Ramp Amplitude
Current Limit Blanking Time in S0 Mode
Current Limit Threshold Offset from 5VDUAL
Minimum Duty Cycle
Maximum Duty Cycle
Soft?Start Pin Current for DDQ
dVOSC
TDDQbk
VOCP
Dmin
Dmax
Iss1
(Note 3)
(Note 3)
(Note 3)
V(SS) = 0.5 V
400
0.8
0
1.3
4.0
100
Vp?p
nS
V
%
%
m A
DDQ ERROR AMPLIFIER
DC Gain
Gain?Bandwidth Product
Slew Rate
GAINDDQ
GBWDDQ
SRDDQ
(Note 3)
COMP PIN to GND = 220 nF,
1.0 W in Series (Note 3)
COMP PIN TO GND = 10 pF
70
12
8.0
dB
MHz
V/uS
3. Guaranteed by design, not tested in production.
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