参数资料
| 型号： | NCP5385MNR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 32/34页 |
| 文件大小： | 0K |
| 描述： | IC CTLR BUCK 2/3/4PHASE 40-QFN |
| 产品变化通告： | Specification Change MSL Updated 13/June/2008 Product Discontinuation 01/Oct/2008 |
| 标准包装： | 2,500 |
| 应用： | 控制器，Intel Pentium? IV |
| 输入电压： | 10.8 V ~ 13.2 V |
| 输出数： | 6 |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 40-VFQFN 裸露焊盘 |
| 供应商设备封装： | 40-QFN（7x7） |
| 包装： | 带卷 (TR) |
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NCP5385
Vout + Zout + RFB · DCR · 5.94
Iout RDRP
RFB · DCR · 5.94
RDRP +
RFB is always set to 1.0 k W and RFB1 is usually set to
100 W for maximum phase boost. The value of RF is
typically set to 4.0 k W .
Droop Injection and Thermal Compensation
The VDRP signal is generated by summing the sensed
output currents for each phase and applying a gain of
approximately six. VDRP is externally summed into the
feedback network by the resistor RDRP. This induces an
offset which is proportional to the output current thereby
forcing the controlled resistive output impedance.
RRDP determines the target output impedance by the
basic equation:
(eq.
10)
Zout
The value of the inductor ’s DCR varies with temperature
according to the following equation 10:
DCRTmax + DCR25C · (1 ) 0.00393 · C ? 1(TTmax ? 25 · C))
(eq. 11)
The system can be thermally compensated to cancel this
effect out to a great degree by adding an NTC (negative
temperature coefficient resistor) in parallel with RFB to
reduce the droop gain as the temperature increases. The
NTC device is nonlinear. Putting a resistor in series with the
NTC helps make the device appear more linear with
temperature. The series resistor is split and inserted on both
sides of the NTC to reduce noise injection into the feedback
loop. The recommended value for RISO1 and RISO2 is
approximately 1.0 k W .
The output impedance varies with inductor temperature by the equation:
Zout(T) +
RFB · DCR25C · (1 ) 0.00393 · C ? 1(T max ? 25C)) · 5.94
Rdroop
(eq. 12)
By including the NTC RT2 and the series isolation resistors the new equation becomes:
Zout(T) +
RFB · (RISO1 ) RT2(T) ) RISO2)
RFB ) RISO1 ) RT2(T) ) RISO2
· DCR25C · (1 ) 0.00393 · C ? 1(T max ? 25C)) · 5.94
Rdroop
(eq. 13)
1 1
RT2(T) + RT225C · e b
*
298
273 ) T
The typical equation of a NTC is based on a curve fit
equation 13.
(eq. 14)
The demo board is populated with a 10 k W NTC with a
Beta of 4300. Figure 21 shows the uncompensated and
compensated output impedance versus temperature.
Figure 21. Uncompensated and Compensated Output
Impedance vs. Temperature
ON Semiconductor provides an excel spreadsheet to
help with the selection of the NTC. The actual selection of
the NTC will be effected by the location of the output
inductor with respect to the NTC and airflow, and should
be verified with an actual system thermal solution.
OVP
The overvoltage protection threshold is not adjustable.
OVP protection is enabled as soon as soft ? start begins and
is disabled when the part is disabled. When OVP is tripped,
the controller commands all four gate drivers to enable
their low side MOSFETs, and VR_RDY transitions low. In
order to recover from an OVP condition, V CC must fall
below the UVLO threshold. See the state diagram for
further details. The OVP circuit monitors the output of
DIFFOUT. If the DIFFOUT signal reaches 180 mV above
the nominal 1.3 V offset the OVP will trip. The DIFFOUT
signal is the difference between the output voltage and the
DAC voltage plus the 1.3 V internal offset. This results in
the OVP tracking the DAC voltage even during a dynamic
change in the VID setting during operation.
Gate Driver and MOSFET Selection
ON Semiconductor provides the companion gate driver
IC (NCP3418B). The NCP3418B driver is optimized to
work with a range of MOSFETs commonly used in CPU
applications. The NCP3418B provides special
functionality and is required for the high performance
dynamic VID operation of the part. Contact your local
ON Semiconductor applications engineer for MOSFET
recommendations.
Board Stack ? Up
The demo board follows the recommended Intel
Stack ? up and copper thickness as shown.
http://onsemi.com
32
相关PDF资料 |
PDF描述 |
|---|---|
| NCP5386BMNR2G | IC CTLR BUCK 1/2PHASE 32-QFN |
| NCP5387MNR2G | IC CTLR BUCK 2/3/4PHASE 40-QFN |
| NCP5388MNR2G | IC CTLR BUCK 2/3/4PHASE 40-QFN |
| NCP5389MNR2G | IC CTLR BUCK 2/3PHASE 32-QFN |
| NCP5391MNR2G | IC CTLR BUCK 2/3PHASE 32-QFN |
相关代理商/技术参数 |
参数描述 |
|---|---|
| NCP5386 | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:1/2 Phase Controller for CPU and Chipset Applications |
| NCP5386A | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:1/2 Phase Controller for CPU and Chipset Applications |
| NCP5386AMNR2G | 功能描述:软开关 PWM 控制器 1/2 PHASE CONTROLLER RoHS:否 制造商:Fairchild Semiconductor 输出端数量: 输出电流: 开关频率: 工作电源电压:30 V 电源电流: 最大工作温度:+ 105 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Reel |
| NCP5386B | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:1/2 Phase Controller for CPU and Chipset Applications |
| NCP5386BMNR2G | 功能描述:软开关 PWM 控制器 1/2 PHASE CONTROLLER RoHS:否 制造商:Fairchild Semiconductor 输出端数量: 输出电流: 开关频率: 工作电源电压:30 V 电源电流: 最大工作温度:+ 105 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Reel |
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