参数资料
型号: NCP5386MNR2G
厂商: ON Semiconductor
文件页数: 6/33页
文件大小: 0K
描述: IC CTLR BUCK 1/2PHASE 32-QFN
标准包装: 2,500
应用: 控制器,Intel VR10、VR11、AMD CPU
输入电压: 4.75 V ~ 5.25 V
输出数: 2
工作温度: 0°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 32-VFQFN 裸露焊盘
供应商设备封装: 32-QFN(5x5)
包装: 带卷 (TR)
NCP5386, NCP5386A, NCP5386B
PIN DESCRIPTIONS
QFN32
Pin No.
32, 1 – 7
8
9
10
11
12
13
14
15
16
17
18
19, 21
20, 22
23
24, 25
26
27
28
29
30
31
33
Symbol
VID0–VID7
DACMODE
SS
ROSC
ILIM
NC
VS+
VS ?
DIFFOUT
COMP
V FB
VDRP
CS1N,
CS2N
CS1, CS2
DRVON
G1, G2
12VMON
V CC
VR_RDY
NTC
VR_FAN
EN
GND
Description
Voltage ID DAC inputs
VRM select bit
A capacitor from this pin to ground programs the soft ? start time.
A resistance from this pin to ground programs the oscillator frequency. Also, this pin supplies an output
voltage of 2 V which may be used to form a voltage divider to the ILIM pin to set the over ? current shutdown
threshold as shown in the Applications Schematics.
Overcurrent shutdown threshold. To program the shutdown threshold, connect this pin to the ROSC pin via a
resistor divider as shown in the Applications Schematics. To disable the over ? current feature, connect this pin
directly to the ROSC pin. To guarantee correct operation, this pin should only be connected to the voltage
generated by the ROSC pin; do not connect this pin to any externally generated voltages.
Do not connect anything to this pin.
Non ? inverting input to the internal differential remote sense amplifier
Inverting input to the internal differential remote sense amplifier
Output of the differential remote sense amplifier
Output of the error amplifier, and the non ? inverting input of the PWM comparators
Error amplifier inverting input. Connect a resistor from this pin to DIFFOUT. The value of this resistor and the
amount of current from the droop resistor (RDRP) will set the amount of output voltage droop (AVP) during
load.
Current signal output for Adaptive Voltage Positioning (AVP). The voltage of this pin above the 1.3 V internal
offset voltage is proportional to the output current. Connect a resistor from this pin to V FB to set the amount of
AVP current into the feedback resistor (R FB ) to produce an output voltage droop. Leave this pin open for no
AVP.
Inverting input to current sense amplifier.
Non ? inverting input to current sense amplifier.
Output to enable Gate Drivers
PWM output pulses to gate drivers
Second UVLO monitor for monitoring the power stage supply rail
Power for the internal control circuits.
Voltage Regulator Ready (Power Good) output. Open drain output that indicates the output is regulating.
Remote temperature sense connection. Connect an NTC thermistor from this pin to GND and a resistor from
this pin to V REF . As the NTC’s temperature increases, the voltage on this pin will decrease.
Open drain output that will be low impedance when the voltage at the NTC pin is above the specified
threshold. This pin will transition to a high impedance state when the voltage at the NTC pin decreases below
the specified threshold. This pin requires an external pull ? up resistor.
Pull this pin high to enable controller. Pull this pin low to disable controller. Either an open ? collector output
(with a pull ? up resistor) or a logic gate (CMOS or totem ? pole output) may be used to drive this pin. A
Low ? to ? High transition on this pin will initiate a soft start. Connect this pin directly to V REF if the Enable
function is not required. 20 MHz filtering at this pin is required.
Power supply return (QFN Flag)
http://onsemi.com
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