参数资料
| 型号： | NCP5392TMNR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 26/30页 |
| 文件大小： | 0K |
| 描述： | IC PHASE CONTROLLER 2/3/4 40-QFN |
| 标准包装： | 1 |
| 应用： | 控制器，Intel VR11，VR11.1，AMD CPU |
| 输入电压： | 4.75 V ~ 5.25 V |
| 输出数： | 4 |
| 输出电压： | 0.375 V ~ 1.6 V |
| 工作温度： | 0°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 40-VFQFN 裸露焊盘 |
| 供应商设备封装： | 40-QFN（6x6） |
| 包装： | 标准包装 |
| 其它名称： | NCP5392TMNR2GOSDKR |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页当前第26页第27页第28页第29页第30页
NCP5392T
? ? 273 + T ? ? ? 298 ? ? (eq. 18)
emulation mode while other phases are shed. Figure 19
indicates a PSI-- on transition from a 3-- phase mode to a
single phase mode. While staying stable in PSI mode, the
PWM signal of phase 1 will vary from a mid-- state level
(1.5 V typical) to high level while other phases all go to
mid-- state level. Vice verse, when PSI signal goes high, the
system will go back to the original phase mode such as
shown in Figure 20.
impedance. The following equations can be used to find the
temperature trip points.
RT1(T) = RT1 25C ? e β
With a beta value of 3740, a 68 k Ω NTC resistor is
selected for RT1, RNTC1 is populated with 19.6 k Ω .
VR_HOT threshold is carefully selected to make sure when
board temperature is less than 92 ? C.
VCC
RNTC1
RT1
0
NTC
0.268 Vcc
+
--
OUT
0
VRHOT
Figure 21. VRHOT Circuit
OVP Improved Performance
The overvoltage protection threshold is not adjustable.
OVP protection is enabled as soon as soft-- start begins and
Figure 19. PSI turns on, CH1: PWM1, CH2: PWM2,
CH3: PWM3, CH4: PSI
is disabled when part is disabled. When OVP is tripped, the
controller commands all four gate drivers to enable their
low side MOSFETs and VR_RDY transitions low. In order
to recover from an OVP condition, V CC must fall below the
UVLO threshold. See the state diagram for further details.
The OVP circuit monitors the output of DIFFOUT. If the
DIFFOUT signal reaches 180 mV (typical) above the
nominal 1.3 V offset the OVP will trip and VRRDY will be
pulled low, after eight consecutive OVP events are
detected, all PWMs will be latched. The DIFFOUT signal
is the difference between the output voltage and the DAC
voltage (minus 19 mV if in VR11.1 modes) plus the 1.3 V
internal offset. This results in the OVP tracking on the DAC
voltage even during a dynamic change in the VID setting
during operation.
Figure 20. PSI turns off, CH1: PWM1, CH2: PWM2,
CH3: PWM3, CH4: PSI
VRHOT
Thermal monitoring circuit consists of one sensitive
comparator that compares the voltage on the NTC pin with
an internal voltage reference. VR_HOT is an open drain
type of output. In normal temperature, the voltage value on
NTC pin is higher than the internal reference, VR_HOT
will be low impedance. When the temperature is higher
than certain threshold, the VR_HOT will be high
Figure 22. VR11.1, 1.6 V OVP Event
http://onsemi.com
26
相关PDF资料 |
PDF描述 |
|---|---|
| NCP5393BMNR2G | IC CTLR 2/3/4PHASE CPU 48QFN |
| NCP5395GMNR2G | IC PHASE CONTROLLER 2/3/4 48-QFN |
| NCP5395MNR2G | IC PHASE CONTROLLER 2/3/4 48-QFN |
| NCP5395TMNR2G | IC PHASE CONTROLLER 2/3/4 48-QFN |
| NCP5422ADR2 | IC REG CTRLR BUCK PWM 16-SOIC |
相关代理商/技术参数 |
参数描述 |
|---|---|
| NCP5393 | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:2/3/4-Phase Controller for CPU Applications |
| NCP5393A | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:2/3/4-Phase Controller for CPU Applications |
| NCP5393AMNR2G | 功能描述:IC PHASE CONTROLLER 2/3/4 48-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 电源管理 - 专用 系列:- 应用说明:Ultrasound Imaging Systems Application Note 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:37 系列:- 应用:医疗用超声波成像，声纳 电流 - 电源:- 电源电压:2.37 V ~ 6 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:56-WFQFN 裸露焊盘 供应商设备封装:56-TQFN-EP（8x8） 包装:管件 |
| NCP5393B | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:2/3/4-Phase Controller for CPU Applications |
| NCP5393BMNR2G | 功能描述:DC/DC 开关控制器 2/3/4 PHASE CONTROL RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
发布紧急采购，3分钟左右您将得到回复。