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参数资料
| 型号： | NCP694HSANADJT1G |
| 厂商： | ON Semiconductor |
| 文件页数： | 6/17页 |
| 文件大小： | 0K |
| 描述： | IC REG LDO ADJ 1A 6HSON |
| 标准包装： | 1 |
| 稳压器拓扑结构： | 正，可调式 |
| 输出电压： | 1 V ~ 6 V |
| 输入电压： | 1.4 V ~ 6 V |
| 电压 - 压降（标准）： | 0.56V @ 1A |
| 稳压器数量： | 1 |
| 电流 - 输出： | 1A |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 6-SMD，扁平引线裸焊盘 |
| 供应商设备封装： | 6-HSON |
| 包装： | 标准包装 |
| 其它名称： | NCP694HSANADJT1GOSDKR |
NCP694
APPLICATIONS INFORMATION
A typical application circuit for the NCP694 series is
shown in Figure 5, Typical Application Schematic.
Input Decoupling (C1)
A 4.7 m F capacitor either ceramic or tantalum is
recommended and should be connected as close as possible
to the pins of NCP694 device. Higher values and lower ESR
will improve the overall line transient response.
Output Decoupling (C2)
The minimum decoupling value is 4.7 m F and can be
augmented to fulfill stringent load transient requirements.
The regulator accepts ceramic chip capacitors as well as
tantalum devices. If a tantalum capacitor is used, and its ESR
is large, the loop oscillation may result. Because of this,
select C2 carefully considering its frequency characteristics.
Larger values improve noise rejection and load regulation
transient response.
Enable Operation
The enable pin CE will turn on or off the regulator. These
limits of threshold are covered in the electrical specification
Set external components, especially the output capacitor,
as close as possible to the circuit, and make leads as short as
possible.
Thermal
As power across the NCP694 increases, it might become
necessary to provide some thermal relief. The maximum
power dissipation supported by the device is dependent
upon board design and layout. Mounting pad configuration
on the PCB, the board material, and also the ambient
temperature effect the rate of temperature rise for the part.
This is stating that when the NCP694 has good thermal
conductivity through the PCB, the junction temperature will
be relatively low with high power dissipation applications.
Output Voltage Setting of Adjustable Version.
An external two resistors are required for setting desired
output voltage as shows Figure 3. Output Voltage Setting.
The equation for the output voltage is mentioned in equation
below.
V out + V ref ) R1 @ I1
section of this data sheet. If the enable is not used then the
pin should be connected to V in . The D version devices
(NCP694DxxxxT1G) have additional circuitry in order to
reach the turn ? off speed faster than normal type. When the
mode is into standby with CE signal, auto discharge
+ V ref ) R1 @ I adj ) I2
+ V ref ) R1 @ V ref R adj ) R1 @ V ref R2
+ V ref @ 1 ) R1 R adj ) R1 R2
(eq. 1)
transistor turns on.
Hints
Please be sure the V in and GND lines are sufficiently wide.
If their impedance is high, noise pickup or unstable
operation may result.
Vout
+ 1.0 @ 1 ) R1 R adj ) R1 R2
For better accuracy, choosing R2 << R adj reduces the error
given by ADJ pin consumption. The typical resistance R adj
is showed in Figure 4. ADJ Pin Resistance
1.8
R1
I1
1.6
ADJ
Iadj
Vref = 1 V
1.4
GND
Radj
R2
I2
1.2
1.0
0.8
? 50
? 25
0
25
50
75
100
T J , TEMPERATURE ( ° C)
Figure 3. Output Voltage Setting
Figure 4. ADJ Pin Resistance vs. Temperature
http://onsemi.com
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