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| 型号： | NCV4264ST50T3G |
| 厂商： | ON Semiconductor |
| 文件页数： | 9/12页 |
| 文件大小： | 0K |
| 描述： | IC REG LDO 5V .1A SOT-223 |
| 产品变化通告： | NCV42xx Obsolescence 27/Apr/2011 |
| 标准包装： | 1 |
| 稳压器拓扑结构： | 正，固定式 |
| 输出电压： | 5V |
| 输入电压： | 最高 45 V |
| 电压 - 压降（标准）： | 0.275V @ 100mA |
| 稳压器数量： | 1 |
| 电流 - 输出： | 100mA |
| 电流 - 限制（最小）： | 150mA |
| 工作温度： | -40°C ~ 150°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | TO-261-4，TO-261AA |
| 供应商设备封装： | SOT-223 |
| 包装： | 剪切带 (CT) |
| 其它名称： | NCV4264ST50T3GOSCT |
NCV4264
PD(max) = [VIN(max) ? VOUT(min)] ?
IQ(max) + VI(max) ? Iq
150 o C ? TA
P θ JA = (eq. 2)
Circuit Description
The NCV4264 is a precision trimmed 5.0 V and 3.3 V
fixed output regulator. The device has current capability of
100 mA, with 500 mV of dropout voltage at 100 mA of
current. The regulation is provided by a PNP pass transistor
controlled by an error amplifier with a bandgap reference.
The regulator is protected by both current limit and short
circuit protection. Thermal shutdown occurs above 150 ° C
to protect the IC during overloads and extreme ambient
temperatures.
Regulator
The error amplifier compares the reference voltage to a
sample of the output voltage (V out ) and drives the base of
a PNP series pass transistor by a buffer. The reference is a
bandgap design to give it a temperature-- stable output.
Saturation control of the PNP is a function of the load
current and input voltage. Over saturation of the output
power device is prevented, and quiescent current in the
ground pin is minimized.
Regulator Stability Considerations
The input capacitor C IN1 in Figure 2 is necessary for
compensating input line reactance. Possible oscillations
caused by input inductance and input capacitance can be
damped by using a resistor of approximately 1 Ω in series
with C IN2 . The output or compensation capacitor, C OUT
helps determine three main characteristics of a linear
regulator: startup delay, load transient response and loop
stability. The capacitor value and type should be based on
cost, availability, size and temperature constraints.
Tantalum, aluminum electrolytic, film, or ceramic
capacitors are all acceptable solutions, however, attention
must be paid to ESR constraints. The aluminum
electrolytic capacitor is the least expensive solution, but, if
the circuit operates at low temperatures (-- 25 ° C to - 40 ° C),
both the value and ESR of the capacitor will vary
considerably. The capacitor manufacturer ’s data sheet
usually provides this information. The value for the output
capacitor C OUT shown in Figure 2 should work for most
applications; however, it is not necessarily the optimized
solution. Stability is guaranteed at values of C Q ≥ 10 m F,
with an ESR ≤ 9 Ω for the 5.0 V Version, and C Q ≥ 22 m F
with an ESR ≤ 16 Ω for the 3.3 V Version within the
operating temperature range. Actual limits are shown in a
graph in the Typical Performance Characteristics section.
Calculating Power Dissipation in a Single Output
Linear Regulator
The maximum power dissipation for a single output
regulator (Figure 3) is:
(eq. 1)
Where:
V IN(max) is the maximum input voltage,
V OUT(min) is the minimum output voltage,
I Q(max) is the maximum output current for the
application, and I q is the quiescent current the regulator
consumes at I Q(max) .
Once the value of P D(Max) is known, the maximum
permissible value of R θ JA can be calculated:
PD
The value of R θ JA can then be compared with those in the
package section of the data sheet. Those packages with
R θ JA ’s less than the calculated value in Equation 2 will keep
the die temperature below 150 ° C. In some cases, none of
the packages will be sufficient to dissipate the heat
generated by the IC, and an external heat sink will be
required. The current flow and voltages are shown in the
Measurement Circuit Diagram.
Heat Sinks
A heat sink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air. Each material in the heat flow path
between the IC and the outside environment will have a
thermal resistance. Like series electrical resistances, these
resistances are summed to determine the value of R θ JA :
R θ JA = R θ JC + R θ CS + R θ SA (eq. 3)
Where:
R θ JC = the junction-- to-- case thermal resistance,
R θ CS = the case-- to-- heat sink thermal resistance, and
R θ SA = the heat sink-- to-- ambient thermal resistance.
R θ JA appears in the package section of the data sheet.
Like R θ JA , it too is a function of package type. R θ CS and
R θ SA are functions of the package type, heat sink and the
interface between them. These values appear in data sheets
of heat sink manufacturers. Thermal, mounting, and heat
sinking are discussed in the ON Semiconductor application
note AN1040/D, available on the ON Semiconductor
Website.
http://onsemi.com
9
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