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| 型号： | NCV5171EDR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 4/19页 |
| 文件大小： | 0K |
| 描述： | IC REG MULTI CONFIG 1.5A 8SOIC |
| 标准包装： | 2,500 |
| 类型： | 升压（升压），反相，回扫，正向转换器，Sepic |
| 输出数： | 1 |
| 输入电压： | 2.7 V ~ 30 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 280kHz |
| 电流 - 输出： | 1.5A |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 8-SOICN |
NCV5171, NCV5173
ELECTRICAL CHARACTERISTICS (2.7 V < V CC < 30 V; ? 40 ? C < T J < 125 ? C unless otherwise stated.)
Characteristic
Test Conditions
Min
Typ
Max
Unit
Power Switch
Switch Saturation Voltage
Switch Current Limit
Minimum Pulse Width
D I CC / D IV SW
Switch Leakage
I SWITCH = 1.5 A, (Note 3)
I SWITCH = 1.0 A, 0 ? C ? T J ? 85 ? C
I SWITCH = 1.0 A, ? 40 ? C ? T J ? 0 ? C
I SWITCH = 10 mA
50% duty cycle, (Note 3)
80% duty cycle, (Note 3)
FB = 0 V, I SW = 4.0 A, (Note 3)
2.7 V ? V CC ? 12 V, 10 mA ? I SW ? 1.0 A
12 V < V CC ? 30 V, 10 mA ? I SW ? 1.0 A
2.7 V ? V CC ? 12 V, 10 mA ? I SW ? 1.5 A, (Note 3)
12 V < V CC ? 30 V, 10 mA ? I SW ? 1.5 A, (Note 3)
V SW = 40 V, V CC = 0V
?
?
?
?
1.6
1.5
200
?
?
?
?
?
0.8
0.55
0.75
0.09
1.9
1.7
250
10
?
17
?
2.0
1.4
?
?
0.45
2.4
2.2
300
30
100
30
100
100
V
A
ns
mA/A
m A
General
Operating Current
Shutdown Mode Current
Minimum Operation Input Voltage
Thermal Shutdown
Thermal Hysteresis
I SW = 0
V C < 0.8 V, SS = 0 V, 2.7 V ? V CC ? 12 V
V C < 0.8 V, SS = 0 V, 12 V ? V CC ? 30 V
V SW switching, maximum I SW = 10 mA
(Note 3)
(Note 3)
?
?
?
?
150
?
5.5
12
?
2.45
180
25
8.0
60
100
2.70
210
?
mA
m A
V
? C
? C
3. Guaranteed by design, not 100% tested in production.
PACKAGE PIN DESCRIPTION
Package
Pin
Pin #
1
2
3
4
5
6
7
8
Symbol
V C
FB
Test
SS
V CC
AGND
PGND
V SW
Function
Loop compensation pin. The V C pin is the output of the error amplifier and is used for loop compensation,
current limit and soft start. Loop compensation can be implemented by a simple RC network as shown in the
application diagram on page 2 as R1 and C1.
Positive regulator feedback pin. This pin senses a positive output voltage and is referenced to 1.276 V. When
the voltage at this pin falls below 0.4 V, chip switching frequency reduces to 20% of the nominal frequency.
These pins are connected to internal test logic and should either be left floating or tied to ground. Connection
to a voltage between 2 V and 6 V shuts down the internal oscillator and leaves the power switch running.
Synchronization and shutdown pin. This pin may be used to synchronize the part to nearly twice the base
frequency. A TTL low will shut the part down and put it into low current mode. If synchronization is not used,
this pin should be either tied high or left floating for normal operation.
Input power supply pin. This pin supplies power to the part and should have a bypass capacitor connected to
AGND.
Analog ground. This pin provides a clean ground for the controller circuitry and should not be in the path of
large currents. The output voltage sensing resistors should be connected to this ground pin. This pin is
connected to the IC substrate.
Power ground. This pin is the ground connection for the emitter of the power switching transistor. Connection
to a good ground plane is essential.
High current switch pin. This pin connects internally to the collector of the power switch. The open voltage
across the power switch can be as high as 40 V. To minimize radiation, use a trace as short as practical.
http://onsemi.com
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