参数资料
型号: NCV8184PDR2G
厂商: ON Semiconductor
文件页数: 15/20页
文件大小: 0K
描述: IC REG LDO ADJ 8SOIC-EP
标准包装: 2,500
稳压器拓扑结构: 正,可调式
输出电压: 可调
输入电压: 4 V ~ 42 V
电压 - 压降(标准): 0.35V @ 60mA
稳压器数量: 1
电流 - 限制(最小): 70mA
工作温度: -40°C ~ 150°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm Width)裸露焊盘
供应商设备封装: 8-SOIC-EP
包装: 带卷 (TR)
NCV8184
Table 3. DPAK 5 ? LEAD THERMAL RC NETWORK MODELS*
Drain Copper Area (1 oz thick)
100 mm 2
645 mm 2
100 mm 2
645 mm 2
(SPICE Deck Format)
Cauer Network
Foster Network
100 mm 2
645 mm 2
Units
Tau
Tau
Units
C_C1
C_C2
C_C3
C_C4
C_C5
C_C6
C_C7
C_C8
C_C9
C_C10
Junction
node1
node2
node3
node4
node5
node6
node7
node8
node9
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
0.0000016
0.0000060
0.0000177
0.0001586
0.0001927
0.0056684
0.0832719
0.1125429
0.5161495
1.4600223
0.0000016
0.0000060
0.0000177
0.0001587
0.0001931
0.0058019
0.1225791
0.3555671
1.2959188
1.8396650
W ? s/C
W ? s/C
W ? s/C
W ? s/C
W ? s/C
W ? s/C
W ? s/C
W ? s/C
W ? s/C
W ? s/C
1.00E-06
1.00E-05
1.00E-04
1.76E-04
0.0010
0.030
0.285
3.00
9.03
55.2
1.00E-06
1.00E-05
1.00E-04
1.76E-04
0.0010
0.030
0.299
3.00
11.80
79.0
sec
sec
sec
sec
sec
sec
sec
sec
sec
sec
100 mm 2
645 mm 2
R’s
R’s
R_R1
R_R2
R_R3
R_R4
R_R5
R_R6
R_R7
R_R8
R_R9
R_R10
Junction
node1
node2
node3
node4
node5
node6
node7
node8
node9
node1
node2
node3
node4
node5
node6
node7
node8
node9
gnd
0.8287213
1.9304163
4.7751915
2.3736457
2.0679537
5.3364094
6.0331860
22.7616126
17.9894079
22.7199543
0.8287120
1.9303119
4.7743247
2.3705112
2.0623650
5.1102633
3.2428679
8.6995800
16.1165074
16.7871407
° C/W
° C/W
° C/W
° C/W
° C/W
° C/W
° C/W
° C/W
° C/W
° C/W
0.490938
1.061544
3.356895
1.606314
5.00
5.00
2.00
9.147005
17.23178
41.92202
0.490938
1.061544
3.356895
1.606314
5.00
5.00
2.00
5.071663
3.646957
34.68827
° C/W
° C/W
° C/W
° C/W
° C/W
° C/W
° C/W
° C/W
° C/W
° C/W
*Bold face items in the tables above represent the package without the external thermal system.
The Cauer networks generally have physical significance
and may be divided between nodes to separate thermal
behavior due to one portion of the network from another.
tools, whereas Foster networks may be more easily
implemented using mathematical tools (for instance, in a
spreadsheet program), according to the following formula:
S 1 Ri 1 ? e ? t taui
The Foster networks, though when sorted by time constant
(as above) bear a rough correlation with the Cauer networks,
are really only convenient mathematical models. Cauer
networks can be easily implemented using circuit simulating
http://onsemi.com
15
R(t) +
n
i +
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