参数资料
型号: NCV8504PWADJR2G
厂商: ON Semiconductor
文件页数: 10/12页
文件大小: 0K
描述: IC REG LDO ADJ .4A 16SOIC
标准包装: 1,000
稳压器拓扑结构: 正,可调式
输出电压: 可调
输入电压: 最高 45 V
电压 - 压降(标准): 0.4V @ 400mA
稳压器数量: 1
电流 - 输出: 400mA
电流 - 限制(最小): 425mA
工作温度: -40°C ~ 150°C
安装类型: 表面贴装
封装/外壳: 16-SOIC(0.295",7.50mm 宽)裸露焊盘
供应商设备封装: 16-SOIC W
包装: 带卷 (TR)
其它名称: NCV8504PWADJR2GOS
NCV8504 Series
APPLICATION NOTES
FLAG MONITOR
Figure 17 shows the FLAG Monitor waveforms as a result
of the circuit depicted in Figure 15. As the input voltage falls
(V MON ), the Monitor threshold is crossed. This causes the
voltage on the FLAG output to go low.
V IN
C IN *
0.1 μ F
V OUT
NCV8504
RESET
R RST
C OUT **
33 μ F
V MON
MON
Flag Monitor
Ref. Voltage
FLAG
*C IN required if regulator is located far from the power supply filter
**C OUT required for stability. Capacitor must operate at minimum
temperature expected
Figure 18. Test and Application Circuit Showing
Output Compensation
CALCULATING POWER DISSIPATION IN A
SINGLE OUTPUT LINEAR REGULATOR
The maximum power dissipation for a single output
regulator (Figure 19) is:
Figure 17. FLAG Monitor Circuit Waveform
PD(max) + [VIN(max) * VOUT(min)] IOUT(max)
) VIN(max)IQ
(1)
tDELAY +
tDELAY + + 14 ms
T
R q JA + 150 C * A
PD
SETTING THE DELAY TIME
The delay time is controlled by the Reset Delay Low
Voltage, Delay Switching Threshold, and the Delay Charge
Current. The delay follows the equation:
CDELAY(Vdt * Reset Delay Low Voltage)
Delay Charge Current
Example:
Using C DELAY = 33 nF.
Assume reset Delay Low Voltage = 0.
Use the typical value for V dt = 1.8 V (2.5 V, 3.3 V, and
5.0 V options).
Use the typical value for Delay Charge Current = 4.2 μ A.
33 nF(1.8 * 0)
4.2 m A
STABILITY CONSIDERATIONS
The output or compensation capacitor helps determine
where:
V IN(max) is the maximum input voltage,
V OUT(min) is the minimum output voltage,
I OUT(max) is the maximum output current for the
application, and
I Q is the quiescent current the regulator consumes at
I OUT(max) .
Once the value of P D(max) is known, the maximum
permissible value of R q JA can be calculated:
o
(2)
The value of R q JA can then be compared with those in the
package section of the data sheet. Those packages with
R q JA ’s less than the calculated value in equation 2 will keep
the die temperature below 150 ° C.
In some cases, none of the packages will be sufficient to
dissipate the heat generated by the IC, and an external
heatsink will be required.
three main characteristics of a linear regulator: start ? up
delay, load transient response and loop stability.
The capacitor value and type should be based on cost,
availability, size and temperature constraints. A tantalum or
V IN
I IN
SMART
REGULATOR ?
I OUT
V OUT
aluminum electrolytic capacitor is best, since a film or
ceramic capacitor with almost zero ESR can cause
instability. The aluminum electrolytic capacitor is the least
expensive solution, but, if the circuit operates at low
temperatures ( ? 25 ° C to ? 40 ° C), both the value and ESR of
the capacitor will vary considerably. The capacitor
manufacturers data sheet usually provides this information.
The value for the output capacitor C OUT shown in Figure 18
should work for most applications, however it is not
Control
} Features
I Q
Figure 19. Single Output Regulator with Key
Performance Parameters Labeled
necessarily the optimized solution.
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