参数资料
型号: NCV8800HDW33
厂商: ON Semiconductor
文件页数: 10/13页
文件大小: 0K
描述: IC REG BUCK SYNC 3.3V 1A 16SOIC
产品变化通告: Product Discontinuation 09/Jan/2008
标准包装: 47
类型: 降压(降压)
输出类型: 固定
输出数: 1
输出电压: 3.3V
输入电压: 3.5 V ~ 16 V
PWM 型: 混合物
频率 - 开关: 200kHz
电流 - 输出: 1A
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 16-SOIC(0.295",7.50mm 宽)
包装: 管件
供应商设备封装: 16-SOIC W
NCV8800 Series
APPLICATIONS INFORMATION
The V 2 control method is illustrated in Figure 8. The output
V OUT
NCV8800
voltage is used to generate both the error signal and the ramp
signal. Since the ramp signal is simply the output voltage, it
R EX
*The value of R1
is dependent
on the output
voltage option
and is between
25 k and 200 k.
FB1
FB2
56 μ A
R1*
R2
21.4 k
Power Up/Down
Sequence and
ENABLE
Error Amp
--
+
1.20 V
Switch
is affected by any change in the output regardless of the origin
of the change. The ramp signal also contains the DC portion
of the output voltage, which allows the control circuit to drive
the main switch to 0% or 100% duty cycle as required.
A change in line voltage changes the current ramp in the
inductor, affecting the ramp signal, which causes the V 2
control scheme to compensate the duty cycle. Since the
change in the inductor current modifies the ramp signal, as
in current mode control, the V 2 control scheme has the same
advantages in line transient response.
A change in load current will have an effect on the output
Figure 7.
Increasing the Output Voltage
Adjustments to the output voltage can be made with an
external resistor (R EX ). The increase in output voltage will
typically be 56 μ A × R EX . Caution and consideration must
be given to the tracking feature and temperature coefficient
and matching of internal and external resistors. Output
tracking always follows the Feedback pins (FB1 and FB2).
The typical temperature coefficient for R1 and R2 is
+4600 ppm/ ° C.
THEORY OF OPERATION
V 2 Control Method
The V 2 method of control uses a ramp signal that is
generated by the ESR of the output capacitors. This ramp is
proportional to the AC current through the main inductor
and is offset by the value of the DC output voltage. This
control scheme inherently compensates for variations in
either line or load conditions, since the ramp signal is
generated from the output voltage itself. This control
scheme differs from traditional techniques such as voltage
mode, which generates an artificial ramp, and current mode,
which generates a ramp from inductor current.
PWM Comparator
GATE(H)
GATE(L)
voltage, altering the ramp signal. A load step immediately
changes the state of the comparator output, which controls
the main switch. Load transient response is determined only
by the comparator response time and the transition speed of
the main switch. The reaction time to an output load step has
no relation to the crossover frequency of the error signal
loop, as in traditional control methods.
The error signal loop can have a low crossover frequency,
since transient response is handled by the ramp signal loop.
The main purpose of this “slow” feedback loop is to provide
DC accuracy. Noise immunity is significantly improved,
since the error amplifier bandwidth can be rolled off at a low
frequency. Enhanced noise immunity improves remote
sensing of the output voltage, since the noise associated with
long feedback traces can be effectively filtered.
Line and load regulations are drastically improved
because there are two independent voltage loops. A voltage
mode controller relies on a change in the error signal to
compensate for a derivation in either line or load voltage.
This change in the error signal causes the output voltage to
change corresponding to the gain of the error amplifier,
which is normally specified as line and load regulation. A
current mode controller maintains fixed error signal under
deviation in the line voltage, since the slope of the ramp
signal changes, but still relies on a change in the error signal
for a deviation in load. The V 2 method of control maintains
a fixed error signal for both line and load variations, since
both line and load affect the ramp signal.
Constant Frequency Operation
During normal operation, the oscillator generates a 200 kHz,
Ramp Signal
Error Amplifier
Output
Voltage
Feedback
90% duty cycle waveform. The rising edge of this waveform
determines the beginning of each switching cycle, at which
point the high--side switch will be turned on. The high--side
switch will be turned off when the ramp signal intersects the
COMP
Error Signal
Reference
Voltage
output of the error amplifier (COMP pin voltage).
Therefore, the switch duty cycle can be modified to regulate
the output voltage to the desired value as line and load
Figure 8. V 2 Control Block Diagram
conditions change.
http://onsemi.com
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