参数资料
型号: NL37WZ04USG
厂商: ON Semiconductor
文件页数: 2/5页
文件大小: 0K
描述: IC INVERTER TRIPLE TTL HS US8
标准包装: 1
系列: 37WZ
逻辑类型: 逆变器,缓冲器
电路数: 3
输入数: 1
电源电压: 1.65 V ~ 5.5 V
电流 - 静态(最大值): 1µA
输出电流高,低: 32mA,32mA
额定电压和最大 CL 时的最大传播延迟: 3.6ns @ 5V,50pF
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
供应商设备封装: US8
封装/外壳: 8-VFSOP(0.091",2.30mm 宽)
包装: 剪切带 (CT)
其它名称: NL37WZ04USGOSCT
NL37WZ04
http://onsemi.com
2
MAXIMUM RATINGS
Symbol
Parameter
Value
Units
VCC
DC Supply Voltage
0.5 to +7.0
V
VI
DC Input Voltage
0.5 to +7.0
V
VO
DC Output Voltage
0.5 to +7.0
V
IIK
DC Input Diode Current
VI < GND
50
mA
IOK
DC Output Diode Current
VO < GND
50
mA
IO
DC Output Sink Current
±50
mA
ICC
DC Supply Current per Supply Pin
±100
mA
IGND
DC Ground Current per Ground Pin
±100
mA
TSTG
Storage Temperature Range
65 to +150
°C
TL
Lead Temperature, 1 mm from Case for 10 Seconds
260
°C
TJ
Junction Temperature under Bias
+150
°C
qJA
Thermal Resistance (Note 1)
250
°C/W
PD
Power Dissipation in Still Air at 85°C
250
mW
MSL
Moisture Sensitivity
Level 1
FR
Flammability Rating
Oxygen Index: 28 to 34
UL 94 V0 @ 0.125 in
VESD
ESD Withstand Voltage
Human Body Model (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
> 2000
> 200
N/A
V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Measured with minimum pad spacing on an FR4 board, using 10 mmby1 inch, 2ounce copper trace with no air flow.
2. Tested to EIA/JESD22A114A.
3. Tested to EIA/JESD22A115A.
4. Tested to JESD22C101A.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Units
VCC
Supply Voltage
Operating
Data Retention Only
1.65
1.5
5.5
V
VI
Input Voltage (Note 5)
0
5.5
V
VO
Output Voltage (HIGH or LOW State)
0
5.5
V
TA
Operating FreeAir Temperature
40
+85
°C
Dt/DV
Input Transition Rise or Fall Rate
VCC = 2.5 V ±0.2 V
VCC = 3.0 V ±0.3 V
VCC = 5.0 V ±0.5 V
0
20
10
5
ns/V
5. Unused inputs may not be left open. All inputs must be tied to a high or lowlogic input voltage level.
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