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参数资料
| 型号： | NM24C04LZN |
| 厂商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分类： | PROM |
| 英文描述： | I2C Serial EEPROM |
| 中文描述： | 4K X 1 I2C/2-WIRE SERIAL EEPROM, PDIP8 |
| 封装： | PLASTIC, DIP-8 |
| 文件页数： | 10/14页 |
| 文件大小： | 104K |
| 代理商： | NM24C04LZN |
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www.fairchildsemi.com
NM24C04/05 Rev. G
N
Acknowledge
The NM24C04/05 device will always respond with an acknowl-
edge after recognition of a start condition and its slave address. If
both the device and a write operation have been selected, the
NM24C04/05 will respond with an acknowledge after the receipt
of each subsequent eight bit byte.
In the read mode the NM24C04/05 slave will transmit eight bits of
data, release the SDA line and monitor the line for an acknowl-
edge. If an acknowledge is detected, NM24C04/05 will continue
to transmit data. If an acknowledge is not detected,NM24C04/05
will terminate further data transmissions and await the stop
condition to return to the standby power mode.
Device Addressing
Following a start condition the master must output the address of
the slave it is accessing. The most significant four bits of the slave
address are those of the device type identifier. This is fixed as
1010 for all EEPROM devices.
Refer the following table for Slave Addresses string details:
Device
A0 A1 A2 Page
Page Block
Addresses
Blocks
NM24C04/05
P
A
A
2
0, 1
A: Refers to a hardware configured Device Address pin.
P: Refers to an internal PAGE BLOCK.
All IIC EEPROMs use an internal protocol that defines a PAGE
BLOCK size of 2K bits (for Word addresses 0x00 through 0xFF).
Therefore, address bits A0, A1, or A2 (if designated 'P') are used
to access a PAGE BLOCK in conjunction with the Word address
used to access any individual data byte.
The last bit of the slave address defines whether a write or read
condition is requested by the master. A '1' indicates that a read
operation is to be executed, and a '0' initiates the write mode.
A simple review: After the NM24C04/05 recognizes the start
condition, the devices interfaced to the IIC bus wait for a slave
address to be transmitted over the SDA line. If the transmitted
slave address matches an address of one of the devices, the
designated slave pulls the line LOW with an acknowledge signal
and awaits further transmissions.
Device Type
Identifier
Device
Address
1
0
1
0
A2
A1
A0
R/W
(LSB)
NM24C04/05
Page
Block Address
相关PDF资料 |
PDF描述 |
|---|---|
| NM24C04LZVM8 | I2C Serial EEPROM |
| NM24C04LZVMT8 | I2C Serial EEPROM |
| NM24C04LZVN | I2C Serial EEPROM |
| NM24C04M8 | I2C Serial EEPROM |
| NM24C04VM8 | I2C Serial EEPROM |
相关代理商/技术参数 |
参数描述 |
|---|---|
| NM24C04LZVM8 | 制造商:FAIRCHILD 制造商全称:Fairchild Semiconductor 功能描述:I2C Serial EEPROM |
| NM24C04LZVMT8 | 制造商:FAIRCHILD 制造商全称:Fairchild Semiconductor 功能描述:I2C Serial EEPROM |
| NM24C04LZVN | 制造商:FAIRCHILD 制造商全称:Fairchild Semiconductor 功能描述:I2C Serial EEPROM |
| NM24C04M | 制造商:未知厂家 制造商全称:未知厂家 功能描述:I2C Serial EEPROM |
| NM24C04M8 | 制造商:FAIRCHILD 制造商全称:Fairchild Semiconductor 功能描述:I2C Serial EEPROM |
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