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参数资料
| 型号： | NM24W04 |
| 厂商： | Fairchild Semiconductor Corporation |
| 元件分类： | EEPROM |
| 英文描述： | 2K/4K/8K/16K-Bit Standard 2-Wire Bus Interface Serial EEPROM with Full Array Write Protect |
| 中文描述： | 2K/4K/8K/16K-Bit标准2线总线接口的串行EEPROM与全阵列写保护 |
| 文件页数： | 9/14页 |
| 文件大小： | 104K |
| 代理商： | NM24W04 |
9
www.fairchildsemi.com
NM24Wxx Rev. C.2
N
S
Write Operations
Byte Write
For a write operation a second address field is required which is
a word address that is comprised of eight bits and provides access
to any one of the 256 words in the selected page of memory. Upon
receipt of the word address the NM24Wxx responds with an
acknowledge and waits for the next eight bits of data, again,
responding with an acknowledge. The master then terminates the
transfer by generating a stop condition, at which time the NM24Wxx
begins the internal write cycle to the nonvolatile memory. While
the internal write cycle is in progress the NM24Wxx inputs are
disabled, and the device will not respond to any requests from the
master. Refer to Figure 5 or the address, acknowledge and data
transfer sequence.
Page Write
The NM24Wxx is capable of a sixteen byte page write operation.
It is initiated in the same manner as the byte write operation; but
instead of terminating the write cycle after the first data word is
transferred, the master can transmit up to fifteen more words. After
the receipt of each word, the NM24Wxx will respond with an
acknowledge.
After the receipt of each word, the internal address counter
increments to the next address and the next SDA data is accepted.
If the master should transmit more than sixteen words prior to
generating the stop condition, the address counter will 'roll over'
and the previously written data will be overwritten. As with the byte
write operation, all inputs are disabled until completion of the
internal write cycle. Refer to Figure 6 for the address, acknowl-
edge, and data transfer sequence.
Acknowledge Polling
Once the stop condition is issued to indicate the end of the host’s
write operation the NM24Wxx initiates the internal write cycle.
ACK polling can be initiated immediately. This involves issuing the
start condition followed by the slave address for a write operation.
If the NM24Wxx is still busy with the write operation no ACK will
be returned. If the NM24Wxx has completed the write operation an
ACK will be returned and the host can then proceed with the next
read or write operation.
Write Protection
Programming of the memory will not take place if the WP pin of the
NM24Wxx is connected to V
CC
. The NM24Wxx will accept slave
and word addresses; but if the memory accessed is write pro-
tected by the WP pin, the NM24Wxx will not generate an acknowl-
edge after the first byte of data has been received, and thus the
program cycle will not be started when the stop condition is
asserted.
S
T
O
P
Bus Activity:
Master
Bus Activity:
NM24Wxx
SDA Line
DATA n + 15
DATA n + 1
DATA n
BYTE ADDRESS (n)
A
C
K
S
T
A
R
T
SLAVE
ADDRESS
A
C
K
A
C
K
A
C
K
A
C
K
S
T
O
P
A
C
K
DATA
A
C
K
A
C
K
S
T
A
R
T
WORD
ADDRESS
SLAVE
ADDRESS
Bus Activity:
Master
Bus Activity:
NM24Wxx
SDA Line
Byte Write (Figure 5)
Page Write (Figure 6)
DS500074-12
DS500074-13
相关PDF资料 |
PDF描述 |
|---|---|
| NM24W02 | REIMS Z-AXIS |
| NM24WXX | 2K/4K/8K/16K-Bit Standard 2-Wire Bus Interface Serial EEPROM with Full Array Write Protect |
| NM24W16 | 2K/4K/8K/16K-Bit Standard 2-Wire Bus Interface Serial EEPROM with Full Array Write Protect |
| NM24W08 | 2K/4K/8K/16K-Bit Standard 2-Wire Bus Interface Serial EEPROM with Full Array Write Protect |
| NM24W16UTLMT8 | 16K-Bit Serial EEPROM 2-Wire Bus Interface |
相关代理商/技术参数 |
参数描述 |
|---|---|
| NM-250 | 制造商:WALDOM ELECTRONICS 功能描述: |
| NM-250-0015P | 制造商:WALDOM ELECTRONICS 功能描述: |
| NM-250-0025P | 制造商:WALDOM ELECTRONICS 功能描述: |
| NM25001S00 | 制造商:RadiSys 功能描述:LVDS;ADDCARD;BG845&LS855 |
| NM25C020 | 制造商:FAIRCHILD 制造商全称:Fairchild Semiconductor 功能描述:2K-Bit Serial CMOS EEPROM (Serial Peripheral Interface (SPI) Synchronous Bus) |
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