参数资料
型号: NOIL1SE0300A-QDC
厂商: ON Semiconductor
文件页数: 12/30页
文件大小: 0K
描述: SENSOR IMAGE COLOR CMOS 48-LCC
标准包装: 1
象素大小: 9.9µm x 9.9µm
有源象素阵列: 640H x 480V
每秒帧数: 250
电源电压: 2.5 V ~ 3.3 V
类型: CMOS 成像
封装/外壳: 48-LCC
供应商设备封装: 48-LCC(14.22x14.22)
包装: 托盘
请注意: *
其它名称: CYIL1SE0300AA-QDC
CYIL1SE0300AA-QDC-ND
NOIL1SM0300A
Table 11. ADVANTAGES AND DISADVANTAGES OF NO N DESTRUCTIVE READOUT
Advantages
Low noise because it is a true CDS.
High sensitivity because the conversion capacitance is kept rather
low.
High dynamic range because the results includes signal for short
and long integrations times.
Sequencer
The sequencer generates the complete internal timing of
the pixel array and the readout. The timing can be controlled
by the user through the SPI register settings. The sequencer
operates on the same clock as the ADCs. This is a division
by 4 of the input clock.
Table 12. INTERNAL REGISTERS
Disadvantages
System memory required to record the reset level and the interme-
diate samples.
Requires multiples readings of each pixel, thus higher data
throughput.
Requires system level digital calculations.
Table 12 shows a list of the internal registers with a short
description. In the next section, the registers are explained
in more detail.
0 (0000)
Address
10:0
1
1
2
1
1
1
1
1
Bits
Name
SEQUENCER
mastermode
ss
gran
enable_analog_out
calib_line
res2_en
res3_en
reverse_x
Description
Default <10:0>: 00000101001
1: master mode; 0: slave mode
1: ss in y; 0: no subsampling
clock granularity
1: enabled; 0: disabled
1: line calibration; 0 frame calibration
1: enable DS; 0: Disable DS
1: enable TS; 0: Disable TS
1: readout in reverse x direction
0: readout in normal x direction
1
1
reverse_y
Ndr
1: readout in reverse y direction
0: readout in normal y direction
1: enable non destructive readout
0: disable non destructive readout
1 (0001)
7:0
START_X
Start pointer X readout
Default <7:0>: 00000000
2 (0010)
8:0
START_Y
Start pointer Y readout
Default <8:0>: 000000000
3 (0011)
7:0
NB_PIX
Number of kernels to read out (4 pixel kernel)
Default <7:0>: 10100000
4 (0100)
11:0
RES1_LENGTH
Length of reset pulse (in number of lines)
Default <11:0>: 000000000010
5 (0101)
11:0
RES2_TIMER
Position of reset DS pulse in number of lines
Default <11:0>: 000000000000
6 (0110)
11:0
RES3_TIMER
Position of reset TS pulse in number of lines
Default <11:0>: 000000000000
7(0111)
11:0
FT_TIMER
Position of frame transfer in number of lines
Default <11:0>: 000111100001
8 (1000)
7:0
VCAL
DAC input for vcal
Default <7:0>: 01001010
http://onsemi.com
12
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