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参数资料
| 型号： | NTE5726 |
| 厂商： | NTE Electronics, Inc. |
| 英文描述： | Powerblock Module |
| 中文描述： | Powerblock模块 |
| 文件页数： | 2/3页 |
| 文件大小： | 30K |
| 代理商： | NTE5726 |
Electrical Specifications:
Parameter
Symbol
Test Conditions
Rating
Unit
Maximum Peak One
–
Cycle
Non
–
Repetitive Surge Current
I
FSM
t = 10ms
t = 8.3ms
t = 10ms
t = 8.3ms
t = 10ms
t = 8.3ms
t = 10ms
t = 8.3ms
t = 0.1 to 10ms, no voltage reapplied
T
J
= +125
°
C, (16.7% x
π
x I
T(AV)
< I <
π
x I
T(AV)
)
T
J
= +125
°
C, (
π
x I
T(AV)
< I < 20 x
π
x I
T(AV)
)
T
J
= +125
°
C, (16.7% x
π
x I
T(AV)
< I <
π
x I
T(AV)
)
T
J
= +125
°
C, (
π
x I
T(AV)
< I < 20 x
π
x I
T(AV)
)
T
J
= +125
°
C, I
TM
=
π
x I
T(AV)
, 180
°
Condition,
Av. Power = V
T(TO)
x I
T(AV)
+ r
t
x (I
T(RMS)
)
2
Anode Supply = 12V, Initial I
T
= 30A, T
J
= +25
°
C
Anode Supply = 12V, Resistive Load = 1
,
Gat Pulse: 10V, 100
μ
s, T
J
= +25
°
C
T
J
= +125
°
C, t
p
≤
5ms
T
J
= +125
°
C, f = 50Hz
T
J
= +125
°
C, t
p
≤
5ms
T
J
= +125
°
C, t
p
≤
5ms
T
J
=
–
40
°
C
Anode Supply = 12V,
T
J
= +25
°
C
T
J
= +125
°
C
T
J
=
–
40
°
C
Anode Supply = 12V,
T
J
= +25
°
C
T
J
= +125
°
C
T
J
= +125
°
C, Rated V
DRM
Applied
Sinusoidal Half Wave, 100% V
RRM
Reapplied, Initial T
J
= +125
C
°
4300
4500
5100
5350
92.5
84.4
131.0
119.3
1310
A
A
A
A
Sinusoidal Half Wave, No Voltage
Reapplied, Initial T
J
= +125
C
°
Maximum I
2
t for Fusing
I
2
t
Sinusoidal Half Wave, 100% V
RRM
Reapplied, Initial T
J
= +125
C
°
A
2
s
A
2
s
A
2
s
A
2
s
A
2
V
V
m
m
V
Sinusoidal Half Wave, No Voltage
Reapplied, Initial T
J
= +125
C
°
Maximum I
2
Threshold Voltage, Low level
Threshold Voltage, High level
On
–
State Slope Resistance, Low Level
On
–
State Slope Resistance, High Level
Maximum On
–
State Voltage Drop
t
I
2
t
t
V
T(TO)1
V
T(TO)2
r
t1
r
t2
V
TM
0.88
1.12
1.20
0.86
1.5
Maximum Holding Current
Maximum Latching Current
I
H
I
L
500
300
mA
mA
Maximum Peak Gate Power
Maximum Average Gate Power
Maximum Peak Gate Current
Maximum Peak Negative Gate Voltage
Maximum Required DC Gate Trigger
Voltage to Trigger
P
GM
P
G(AV)
+I
GM
–
V
GT
V
GT
10
2.0
3.0
5.0
4.0
3.0
2.0
350
200
100
0.3
W
W
A
V
V
V
V
mA
mA
mA
V
Resistive Load: R
A
= 1
Maximum Required DC Gate Trigger
Current to Trigger
I
GT
Resistive Load: R
A
= 1
Maximum Gate Voltage that will not
Trigger
Maximum Gate Current that will not
Trigger
Maximum Rate of Rise of
Turned
–
On Current
Typical Delay Time
Typical Rise Time
Typical Turn
–
Off Time
V
GD
I
GD
T
J
= +125
°
C, Rated V
DRM
Applied
10
mA
di/dt
T
J
= +125
°
C, I
TM
= 400A, Rated V
DRM
Applied
500
A/
μ
s
t
d
t
r
t
q
T
J
= +25
°
C, Gate Current = 1A di
G
/dt = 1A/
μ
s,
V
D
= 0.67% V
DRM
1.0
2.0
μ
s
μ
s
μ
s
T
J
= +25
°
C, I
TM
= 300A,
–
dI/dt = 15A/
μ
s, V
R
= 50V,
dV/dt = 20V/
μ
s, Gate 0V, 100
50
–
150
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