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NTE7108
Integrated Circuit
1.3GHz Phase Locked Loop
w
/I
2
C Bus
Description:
The NTE7108 is an integrated circuit in an 18–Lead DIP type package and when used in combination
with a VCO (tuner), comprises a digital programmable phase–locked loop (PLL) for television devices
designed to use the PLL frequency synthesis tuning principle.
The PLL provides a crystal–stable frequency for tuner oscillators between 16
~
1300MHz in the
62.5kHz raster. By including an external prescaler 1/2, the component can also be used for synthesiz-
ing applications of up to 2.4GHz (e.g. satellite receivers). As a result, the resolution is doubled to
125kHz. The tuning process is controlled via an I
2
C bus by the microprocessor.
Features:
Low Current Consumption
Message Transmission Via I
2
C Bus
4 Software–Controlled Outputs
Cost–Effective and Space–Saving Design
Prescaler Output Frequency is Free from Interference Radiation
Absolute Maximum Ratings:
(Note 1)
Supply Voltage, V
S
Output PD, V
1
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Crystal Q1, V
2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Crystal Q2, V
3
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Bus Input/Output SDA, V
4
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Bus Input SCL, V
5
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Port Output P7, V
6
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Port Output P6, V
7
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Port Output P5, V
8
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Port Output P4, V
9
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Port Output P3, V
10
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Port Output P2, V
11
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Port Output P1, V
12
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Port Output P0, V
13
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Signal Input UHF/VHF, V
15
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reference Input REF, V
16
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Active Filter V
D
, V
18
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Bus Output SDA (Open Collector), I
4L
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Port Output P7 (Open Collector), I
6L
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Note 1. Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage
to the device. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
–0.3V to 6V
–0.3V to V
S
–0.3V to V
S
–0.3V to V
S
–0.3V to V
S
–0.3V to V
S
–0.3V to +16V
–0.3V to +16V
–0.3V to +16V
–0.3V to +16V
–0.3V to +16V
–0.3V to +16V
–0.3V to +16V
–0.3V to +16V
–0.3V to +2.5V
–0.3V to +2.5V
–0.3V to V
S
–1mA to +5mA
–1mA to +5mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .