参数资料
型号: NTE7156
厂商: NTE Electronics, Inc.
英文描述: Integrated Circuit DC-Coupled Vertical Deflection Circuit
中文描述: 集成电路DC耦合垂直偏转电路
文件页数: 3/4页
文件大小: 36K
代理商: NTE7156
Notes:
Note 1. A flyback supply voltage of > 50V up to 60V is allowed in application. A 22
nF capacititor
in series with a 22
resistor (depending on I
O
and the inductance of the coil) has to be con-
nected between Pin7 and GND. The decoupling capacitor of V
FB
has to be connected be-
tween Pin6 and Pin3. This supply voltage line must have a resistance of 33
.
Note 4. The linearity error is measured without S
correction and based on the same measurement
principle as performed on the screen. The measuring method is as follows:
Divide the output signal I
4
I
7
(V
RM
) into 22 equal parts ranging from 1 to 22 inclusive. Measure
the value of two succeeding parts called one block starting with part 2 and 3 (block 1) and ending
with part 20 and 21 (block 10). Thus part 1 and 22 are unused. The equations for linearity error
for adjacent blocks (LEAB) and linearity error for not adjacent blocks (LENAB) are given below:
a
k
a
(k + 1)
a
avg
a
avg
Note 5. Referenced to V
P
.
LEAB =
; LEAB =
a
max
a
min
Note 6. The V values within formulae relate to voltages at or across relative pin numbers, i.e.
V
7
4
/V
1
2
= voltage value across Pin7 and Pin4 divided by voltage value across Pin1 and Pin2.
Note 7. V
9
4
AC short
circuited.
Note 8. Frequency response V
7
4
/V
9
4
is equal to frequency response V
7
4
/V
1
2
.
Note 9. At V
(ripple)
= 500mV eff; measured across R
M
; f
i
= 50Hz.
I
drive(pos)
I
drive(neg)
V
O(B)
V
P
V
FB
GND
V
O(A)
V
O(guard)
V
I(fb)
Pin Connection Diagram
(Front View)
9
8
7
6
5
4
3
2
1
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