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参数资料
| 型号： | NTE8374 |
| 元件分类： | 编、解码器及复用、解复用 |
| 英文描述： | SEVEN SEGMENT DECODER/DRIVER, INVERTED OUTPUT, PDIP16 |
| 封装： | DIP-16 |
| 文件页数： | 2/4页 |
| 文件大小： | 30K |
| 代理商： | NTE8374 |
Functional Description:
The NTE8374 is a 7–segment decoder/driver with latches on the address inputs and active LOW
constant current outputs to drive LEDs directly. This device accepts a 4–bit binary code and produces
output drive to the appropriate segments of the 7–segment display. It has a decode format which pro-
duces numeric codes “0” through “9” and other codes.
Latches on the four data inputs are controlled by an active LOW Latch Enable, LE. When LE is LOW,
the state of the outputs is determined by the input data. When LE goes HIGH, the last data present
at the inputs is stored in the latches and the outputs remain stable. The LE pulse width necessary
to accept and store data can be routed directly from high speed counters and frequency dividers into
the display without slowing down the system clock or providing intermediate data storage.
The latch/decoder combination is a simple system which drives LED displays with multiplexed data
input from MOS time clocks, DVMs, calculator chips, etc. Data inputs are multiplexed while the dis-
plays are in static mode. This lowers component and insertion costs, since several circuits–seven
resistors per display, strobe drivers, a separate display voltage source, and clock failure detect cir-
cuits–traditionally found in multiplexed display systems are eliminated. It also allos low strobing rates
to be used without display flicker.
Another NTE8374 feature is the reduced loading on the data inputs when the Latch Enable is HIGH
(only 10
A typ). This allows many NTE8374s to be driven from a MOS device in multiplex mode with-
out the need for drivers on the data lines. The NTE8374 also provides automatic blanking capability
0060.0300 would be displayed as 60.03. Leading–edge zero suppression is obtained by connecting
the Ripple Blanking Output (RBO) of a decoder to the Ripple Blanking Input (RBI) of the next lower
stage device. The most significant decoder stage should have the RBI input grounded; and since
suppression of the least significant integer zero in a number is not usually desired, the RBI input of
this decoder stage should be left open. A similar procedure for the fractional part of a display will pro-
vide automatic suppression of trailing–edge zeros. The RBO terminal of the decoder can be or tied
with a modulating signal via an isolating buffer to achieve duration intensity modulation. A suitable
signal can be generated for this purpose by forming a variable frequency multivibrator with a cross
coupled pair of TTL or DTL gates.
DC Characteristics: (TA = 0 to +70°C unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Output Voltage, Applied (OFF)
VOUT
Separate LED Supply
–
10
V
Output LOW Current, a – g
IOL
VCC = 5V, VOL = 3V, TA = +25°C
12
–
18
mA
Output HIGH Current, a – g
IOH
VCC = Max, VOUT = 5.5V
–
250
A
Power Supply Current
ICC
VCC = Max, VIN = GND, VOUT = 3V
–
50
mA
AC Characteristics: (VCC = +5VTA = +25°C unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Propagation Delay, An to a – g
tPLH, tPHL CL = 15pF, RL = 1k
–
140
ns
Propagation Delay, LE to a – g
tPLH, tPHL CL = 15pF, RL = 1k
–
140
ns
AC Operating Requirements: (VCC = +5VTA = +25°C unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Setup Time HIGH or LOW, An to LE
ts (H)
75
–
ns
ts (L)
30
–
ns
Hold Time HIGH or LOW, An to LE
th (H)
0
–
ns
th (L)
0
–
ns
LE Pulse Width LOW
tw (L)
85
–
ns
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