参数资料
型号: NTE861
厂商: NTE Electronics, Inc.
英文描述: Integrated Circuit Quad, Normally Open, SPST JFET Analog Switch w/Disable
中文描述: 集成电路四,聚苯乙烯场效应模拟开关,常开/禁用
文件页数: 2/3页
文件大小: 26K
代理商: NTE861
Electrical Characteristics:
(Note 2)
Parameter
Symbol
R
ON
Test Conditions
Min
±
10
2.0
Typ
150
200
10
±
11
0.3
3
0.4
3
0.1
3
3.6
500
90
80
4.0
3.0
5.0
Max
250
350
50
10
30
10
30
10
30
0.8
40
100
0.1
1.0
Unit
V
nA
nA
nA
nA
nA
nA
V
V
μ
A
μ
A
μ
A
μ
A
ns
ns
ns
pF
pF
pF
ON
Resistance
V
A
= 0, I
D
= 1mA
T
A
= +25
°
C
ON
Resistance Matching
Analog Range
Leakage Current in
ON
Condition
R
ON
Match
V
A
I
S(ON)
+
I
D(ON)
+
T
A
= +25
°
C
Switch
ON
,
V
S
= V
D
=
10V
±
T
A
= +25
°
C
Source Current in
OFF
Condition
I
S(OFF)
Switch
OFF
,
V
S
= +10V, V
D
=
10V
T
A
= +25
°
C
Drain Current in
OFF
Condition
I
D(OFF)
T
A
= +25
°
C
Logical
1
Input Voltage
Logical
0
Input Voltage
Logical
1
Input Current
V
INH
V
INL
I
INH
V
IN
= 5V
T
A
= +25
°
C
Logical
0
Input Current
I
INL
V
IN
= 0.8V
T
A
= +25
°
C
Delay Time
ON
Delay Time
OFF
Break
Before
Make
Source Capacitance
Drain Capacitance
Active Source and Drain
Capacitance
OFF
Isolation
Crosstalk
Analog Slew Rate
Disable Current
t
ON
t
OFF
V
S
=
±
10V, T
A
= +25
°
C
V
S
=
±
10V, T
A
= +25
°
C
V
S
=
±
10V, T
A
= +25
°
C
Switch
OFF
, V
S
=
±
10V, T
A
= +25
°
C
Switch
OFF
, V
D
=
±
10V, T
A
= +25
°
C
Switch
ON
, V
S
= V
D
=
±
10V,
T
A
= +25
°
C
T
A
= +25
°
C, Note 3
T
A
= +25
°
C, Note 3
T
A
= +25
°
C, Note 4
Note 5
t
ON
t
OFF
C
S(OFF)
C
D(OFF)
C
S(ON)
+
C
D(ON)
+
I
SO(OFF)
CT
SR
I
DIS
50
65
50
0.6
0.9
4.3
6.0
2.7
3.8
7.0
9.8
dB
dB
V/
μ
s
mA
mA
mA
mA
mA
mA
mA
mA
T
A
= +25
°
C
1.5
2.3
7.0
10.5
5.0
7.5
9.0
13.5
Negative Supply Current
I
EE
All Switches
OFF
,
V
S
=
±
10V
T
A
= +25
°
C
Reference Supply Current
I
R
T
A
= +25
°
C
Positive Supply Current
I
CC
T
A
= +25
°
C
Note 2. V
CC
= +15V, V
EE
=
15V, V
R
= 0V, and limits apply for
25
°
C
T
A
+85
°
C unless otherwise
specified.
Note 3. These parameters are limited by the pin to pin capacitance of the package.
Note 4. This is the analog signal slew rate above which the signal is distorted as a result of finite internal
slew rates.
Note 5. All switches in the device are turned
OFF
by saturating a transistor at the disable node.
The delay times will be approximately equal to the t
ON
or t
OFF
plus the delay introduced by
the external transistor.
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