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参数资料
| 型号： | NVT2010PW |
| 厂商： | NXP SEMICONDUCTORS |
| 元件分类： | 通用总线功能 |
| 英文描述： | Bidirectional voltage-level translator for open-drain and push-pull applications |
| 中文描述： | GTL TO TTL TRANSCEIVER, PDSO24 |
| 封装： | 4.40 MM, LEAD FREE, PLASTIC, MO-153, SOT355-1, TSSOP-24 |
| 文件页数： | 10/26页 |
| 文件大小： | 459K |
| 代理商： | NVT2010PW |
NVT2008_NVT2010
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 1 — 8 September 2010
10 of 26
NXP Semiconductors
NVT2008; NVT2010
Bidirectional voltage-level translator
must be able to sink the total current from the resistors on both sides of the NVT20xx
device at 0.175 V, although the 15 mA only applies to current flowing through the
NVT20xx device.
[1]
+10 % to compensate for V
CC
range and resistor tolerance.
7.4.1
Maximum frequency calculation
The maximum frequency is totally dependent upon the specifics of the application and the
device can operate > 33 MHz. Basically, the NVT20xx behaves like a wire with the
additional characteristics of transistor device physics and should be capable of performing
at higher frequencies if used correctly.
Here are some guidelines to follow that will help maximize the performance of the device:
Keep trace length to a minimum by placing the NVT20xx close to the processor.
The trace length should have a time of flight less than half of the transition time to
reduce ringing and reflections.
The faster the edge of the signal, the higher the chance for ringing.
The higher the drive strength (up to 15 mA), the higher the frequency the device can
use.
In a 3.3 V to 1.8 V direction level shift, if the 3.3 V side is being driven by a totem pole type
driver no pull-up resistor is needed on the 3.3 V side. The capacitance and line length of
concern is on the 1.8 V side since it is driven through the ON resistance of the NVT20xx.
If the line length on the 1.8 V side is long enough there can be a reflection at the
chip/terminating end of the wire when the transition time is shorter than the time of flight of
the wire because the NVT20xx looks like a high-impedance compared to the wire. If the
wire is not too long and the lumped capacitance is not excessive the signal will only be
slightly degraded by the series resistance added by passing through the NVT20xx. If the
lumped capacitance is large the rise time will deteriorate, the fall time is much less
affected and if the rise time is slowed down too much the duty cycle of the clock will be
degraded and at some point the clock will no longer be useful. So the principle design
consideration is to minimize the wire length and the capacitance on the 1.8 V side for the
clock path. A pull-up resistor on the 1.8 V side can also be used to trade a slower fall time
for a faster rise time and can also reduce the overshoot in some cases.
Table 5.
Calculated for V
OL
= 0.35 V; assumes output driver V
OL
= 0.175 V at stated current.
V
pu(D)
64 mA
32 mA
Nominal
+10 %
[1]
Nominal
5 V
3.3 V
2.5 V
1.8 V
1.5 V
1.2 V
Pull-up resistor values
Pull-up resistor value (
Ω
)
15 mA
+10 %
[1]
Nominal
310
197
143
97
77
57
10 mA
3 mA
+10 %
[1]
341
217
158
106
85
63
Nominal
465
295
215
145
115
85
+10 %
[1]
512
325
237
160
127
94
Nominal
1550
983
717
483
383
283
+10 %
[1]
1705
1082
788
532
422
312
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