参数资料
型号: OP177FSZ-REEL7
厂商: Analog Devices Inc
文件页数: 11/16页
文件大小: 0K
描述: IC OPAMP GP PREC LN 8SOIC
产品变化通告: OP07, OP177 Redesign Change 19/Jul/2011
设计资源: AD7266 SAR ADC in DC-Coupled Differential and Single-Ended Appls (CN0039)
DC-Coupled, Single-Ended-to-Differential Conversion Using AD8138 and AD7352 (CN0040)
DC-Coupled, Single-Ended-to-Differential Conversion Using AD8138 and AD7356 (CN0041)
AD7265 in Differential and Single-Ended Configurations Using AD8022 (CN0048)
Unipolar, Precision DC Digital-to-Analog Conversion using AD5450/1/2/3 8-14-Bit DACs (CN0052)
DC-Coupled, Single-Ended-to-Differential Conversion Using AD8138 and AD7357 (CN0061)
标准包装: 1,000
放大器类型: 通用
电路数: 1
转换速率: 0.3 V/µs
增益带宽积: 600kHz
电流 - 输入偏压: 1.2nA
电压 - 输入偏移: 10µV
电流 - 电源: 1.6mA
电压 - 电源,单路/双路(±): 6 V ~ 36 V,±3 V ~ 18 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SO
包装: 带卷 (TR)
OP177
Data Sheet
Rev. G | Page 4 of 16
@ VS = ±15 V, 40°C ≤ TA ≤ +85°C, unless otherwise noted.
Table 2.
OP177F
OP177G
Parameter
Symbol
Conditions
Min
Typ
Max
Min
Typ
Max
Unit
INPUT
Input Offset Voltage
VOS
15
40
20
100
μV
Average Input Offset Voltage Drift1
TCVOS
0.1
0.3
0.7
1.2
μV/°C
Input Offset Current
IOS
0.5
2.2
0.5
4.5
nA
Average Input Offset Current Drift2
TCIOS
1.5
40
1.5
85
pA/°C
Input Bias Current
IB
0.2
+2.4
+4
+2.4
±6
nA
Average Input Bias Current Drift2
TCIB
8
40
15
60
pA/°C
Input Voltage Range3
IVR
±13
±13.5
±13
±13.5
V
COMMON-MODE REJECTION RATIO
CMRR
VCM = ±13 V
120
140
110
140
dB
POWER SUPPLY REJECTION RATIO
PSRR
VS = ±3 V to ±18 V
110
120
106
115
dB
LARGE-SIGNAL VOLTAGE GAIN4
AVO
RL ≥ 2 k, VO = ±10 V
2000
6000
1000
4000
V/mV
OUTPUT VOLTAGE SWING
VO
RL ≥ 2 k
±12
±13
±12
±13
V
POWER CONSUMPTION
PD
VS = ±15 V, no load
60
75
60
75
mW
SUPPLY CURRENT
ISY
VS = ±15 V, no load
20
2.5
2
2.5
mA
1
TCVOS is sample tested.
2
Guaranteed by endpoint limits.
3
Guaranteed by CMRR test condition.
4
To ensure high open-loop gain throughout the ±10 V output range, AVO is tested at 10 V ≤ VO ≤ 0 V, 0 V ≤ VO ≤ +10 V, and 10 V ≤ VO ≤ +10 V.
TEST CIRCUITS
200k
50
VOS =
VO
4000
VO
00289-
003
OP177
+
Figure 3. Typical Offset Voltage Test Circuit
OP177
V+
OUTPUT
+
+
INPUT
V–
20k
VOS TRIM RANGE IS
TYPICALLY ±3.0mV
00289-
004
Figure 4. Optional Offset Nulling Circuit
OP177
+
PINOUTS SHOWN FOR
P AND Z PACKAGES
00289-
005
+20V
–20V
20k
Figure 5. Burn-In Circuit
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