参数资料
型号: OP4005B1
厂商: RFM
文件页数: 1/2页
文件大小: 0K
描述: IC VCSC OPT CLK 622.08MHZ 8-SMCA
标准包装: 50
类型: VCSO(SAW)
频率: 622.08MHz
功能: 三态(输出启用)
电源电压: 3.13V ~ 5.25V
频率稳定性: ±100ppm
工作温度: -40°C ~ 85°C
电流 - 电源(最大): 70mA
安装类型: 表面贴装
尺寸/尺寸: 0.530" L x 0.360" W(13.46mm x 9.14mm)
高度: 0.080"(2.03mm)
封装/外壳: 8-SMD
包装: 带卷 (TR)
OP4005B1
?
Quartz SAW Stabilized Differential Output Technology
?
?
?
Very Low Jitter Fundamental-Mode Operation at 622.08 MHz
Voltage Tunable for Phase Locked Loop Applications
Timing Reference for Optical Data Communications Systems
622.08 MHz
Optical
The OP4005B1 is a voltage-controlled SAW clock (VCSC) designed for phase-locked loop (PLL) applications
in optical data communications systems. The differential outputs of the OP4005B1 are generated by high-Q,
fundamental mode quartz surface acoustic wave (SAW) technology. This technique provides very low output
jitter and phase noise, plus excellent immunity to power supply noise. The OP4005B1 differential outputs
feature ±1% symmetry, and can be DC-configured to drive a wide range of high-speed logic families. The
OP4005B1 is packaged in a hermetic metal-ceramic LCC.
Absolute Maximum Ratings
Timing Clock
Rating
DC Suppy Voltage
Tune Voltage
Value
0 to 5.5
0 to 5.5
Units
Vdc
Vdc
Case Temperature
-55 to 100
°C
SMC-08A
Electrical Characteristics
Characteristic
Operating Frequency
Absolute Frequency
Sym
f O
Notes
1
Minimum
Typical
622.08
Maximum
Units
MHz
Tuning Range
2
±100
ppm
Tuning Voltage
Tuning Linearity
Modulation Bandwidth
1
1
0
200
±5
3.3
Vdc
%
kHz
Q and Q Output
Voltage into 50 Ω (VSWR ≤ 1.2)
V O
1,3
0.60
1.1
V P-P
Operating Load VSWR
1,3
2:1
Symmetry
Harmonic Spurious
Nonharmonic Spurious
3, 4, 5
3, 4, 6
3, 4, 6, 7
45
55
-15
-60
%
dBc
dBc
Phase Noise
Q and Q Jitter
@ 100 Hz offset
@ 1 kHz offset
@ 10 kHz offset
Noise Floor
RMS Jitter (10kHz to 80MHz)
3, 6
3, 6
3, 6
3, 6
3, 4, 6, 7
-70
-100
-125
-150
0.1
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
ps
No Noise on V CC
200 mV P-P Noise, from 1 MHz to ? f O on V CC
Input Impedence (Tuning Port)
3, 4, 6, 7
3
8
12
12
10
ps P-P
ps P-P
K Ω
Output DC Resistance (between Q & Q)
1, 3
50
K Ω
DC Power Supply
Operating Voltage
V CC
1, 3
3.13
3.3 or 5.0
5.25
Vdc
Operating Current
I CC
1, 3
70
mA
Operating Case Temperature
T C
1, 3
-40°C
+85°C
°C
Lid Symbolization (YY=Year, WW=Week)
RFM OP4005B1 YYWW
CAUTION: Electrostatic Sensitive Device. Observe precautions for handling. COCOM CAUTION: Approval by the U.S.
Department of Commerce is required prior to export of this device.
Notes:
1.
2.
3.
4.
5.
6.
7.
8.
Unless otherwise noted, all specifications include the combined effects of load VSWR, V CC and T C .
Net tuning range after tuning out the effects of initial manufacturing tolerances, VSWR pushing/pulling, V CC , T C and aging.
The internal design, manufacturing processes, and specifications of this device are subject to change without notice.
Specified only for a balanced load with a VSWR < 1.2 ( 50 ohms each side), and a V CC = 3.0 Vdc.
Symmetry is defined as the width in (% of total period) measure at 50% of the peak-to-peak voltage of either output.
Jitter and other noise outputs due to power supply noise or mechanical vibration are not included in this specification except where noted.
Applies to period jitter of either differential output. Measured with a Tektronix CSA803 signal analyzer with at least 1000 samples.
One or more of the following United States patents apply: 4, 616,197; 4,670,681; 4,760,352.
www.RFM.com E-mail: info@rfm.com
?2008 by RF Monolithics, Inc.
Page 1 of 2
OP4005B1 - 3/27/08
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