参数资料
型号: OP467GSZ-REEL
厂商: Analog Devices Inc
文件页数: 17/20页
文件大小: 0K
描述: IC OPAMP GP 28MHZ QUAD 16SOIC
标准包装: 1,000
放大器类型: 通用
电路数: 4
转换速率: 350 V/µs
增益带宽积: 28MHz
电流 - 输入偏压: 150nA
电压 - 输入偏移: 200µV
电流 - 电源: 8mA
电压 - 电源,单路/双路(±): ±4.5 V ~ 18 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-SOIC(0.295",7.50mm 宽)
供应商设备封装: 16-SOIC W
包装: 带卷 (TR)
OP467
Rev. | Page 6 o f 20
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter1
Rating
Supply Voltage
±18 V
Input Voltage2
±18 V
Differential Input Voltage2
±26 V
Output Short-Circuit Duration
Limited
Storage Temperature Range
14-Lead CERDIP and 20-Terminal LCC
65°C to +175°C
14-Lead PDIP and 16-Lead SOIC
65°C to +150°C
Operating Temperature Range
OP467A
55°C to +125°C
OP467G
40°C to +85°C
Junction Temperature Range
14-Lead CERDIP and 20-Terminal LCC
65°C to +175°C
14-Lead PDIP and 16-Lead SOIC
65°C to +150°C
Lead Temperature (Soldering, 60 sec)
300°C
1 Absolute maximum ratings apply to both DICE and packaged parts, unless
otherwise noted.
2 For supply voltages less than ±18 V, the absolute maximum input voltage is
equal to the supply voltage.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 5.
Package Type
θJA1
θJC
Unit
14-Lead CERDIP (Y)
94
10
°C/W
14-Lead PDIP (P)
76
33
°C/W
16-Lead SOIC (S)
88
23
°C/W
20-Terminal LCC (RC)
78
33
°C/W
1 θJA is specified for the worst-case conditions, that is, θJA is specified for device
in socket for CERDIP, PDIP, and LCC packages, and θJA is specified for device
soldered in circuit board for the SOIC package.
DICE CHARACTERISTICS
00302
-0
05
1
2
3
4
5
67
8
9
10 +IN C
–IN C
+IN D
–IN D
–IN A
+IN A
+IN B
–IN B
V+
OU
T
D
OU
T
A
T
C
T
B
V–
11
12
13
14
OU
Figure 5. 0.111 Inch × 0.100 Inch DIE Size, 11,100 sq. mils,
Substrate Connected to V+, 165 Transistors
ESD CAUTION
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