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参数资料
型号： ORT82G5-2F680C
厂商： Lattice Semiconductor Corporation
文件页数： 82/119页
文件大小： 0K
描述： IC FPSC TRANSCEIVER 8CH 680-BGA
产品变化通告： Product Discontinuation 01/Aug/2011
标准包装： 24
系列： *
Lattice Semiconductor
ORCA ORT42G5 and ORT82G5 Data Sheet
65
30933
[0:3]
—
00
Reserved for future use.
[4:5]
—
Reserved for future use.
[6]
—
Reserved for future use.
[7]
—
Reserved for future use.
Status Registers (Read Only, Clear on Read), xx = [AC, AD, BC or BD]
30804 - Ax
30904 - Bx
[0:1]
—
00
Reserved for future use.
[2:3]
—
Reserved for future use.
[4:5] XAUISTAT_xC
XAUI Status Register. Status of XAUI link state machine for Channel xC
00 – No synchronization, 10 – Synchronization done, 11 – Not used, 01
– no_comma (see XAUI state machine) and at least one CV detected.
XAUISTAT_xC[0:1] = 00 on device reset.
[6:7] XAUISTAT_xD
XAUI Status Register. Status of XAUI link state machine for Channel xD
00 – No synchronization, 10 – Synchronization done, 11 – Not used, 01
– no_comma (see XAUI state machine) and at least one CV detected.
XAUISTAT_xD[0:1] = 00 on device reset.
30805 - Ax
30905 - Bx
[0]]
—
00
Reserved for future use.
[1]
—
Reserved for future use.
[2]
DEMUXWAS_xC
Status of Word Alignment. When DEMUX_WAS_xC=1, word alignment
is achieved for Channel xC. DEMUX_WAS_xC=0 on device reset.
[3]
DEMUXWAS_xD
Status of Word Alignment. When DEMUX_WAS_xD=1, word alignment
is achieved for Channel xD. DEMUX_WAS_xD=0 on device reset.
[4]
—
Reserved for future use.
[5]
—
Reserved for future use.
[6]
CH24_SYNC_xC
Status of Channel Alignment. When CH24_SYNC_xC=1, multi-channel
alignment is achieved for Channel xC. CH24_SYNC_xC=0 on device
reset.
[7]
CH24_SYNC_xD
Status of Channel Alignment. When CH24_SYNC_xD=1, multi-channel
alignment is achieved for Channel xD. CH24_SYNC_xD=0 on device
reset.
30814 - A
30914 - B
[0]
—
00
Reserved for future use.
[1]
SYNC2_[A:B]_OVFL
Multi-Channel Overow Status. When SYNC2_[A:B]_OVFL=1, twin
channel synchronization FIFO overow has occurred.
SYNC2_[A:B]_OVFL=0 on device reset.
[2:3]
—
Reserved for future use.
[4]
SYNC2_[A:B]_OOS
Multi-Channel Out-Of-Sync Status. When SYNC2_[A:B]_OOS=1, twin
channel synchronization has failed.
SYNC2_[A:B]_OOS=0 on device reset.
[5:7]
—
Reserved for future use.
Table 28. ORT42G5 Memory Map (Continued)
(0x)
Absolute
Address
Bit
Name
Reset
Value
(0x)
Description
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ORT82G5-2F680I 功能描述:FPGA - 现场可编程门阵列 ORCA FPSC 2.7GBITS/s BP XCVR 643K RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
ORT82G5-2FN680C 功能描述:FPGA - 现场可编程门阵列 ORCA FPSC 1.5V 3.7 G b Bpln Xcvr 643K Gt RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
ORT82G5-2FN680C1 功能描述:FPGA - 现场可编程门阵列 10368 LUT 372 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
ORT82G5-2FN680I 功能描述:FPGA - 现场可编程门阵列 ORCA FPSC 3.7 Gb Bp ln Xcvr 643K Gt I RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
ORT82G5-2FN680I1 功能描述:FPGA - 现场可编程门阵列 10368 LUT 372 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
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