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参数资料
| 型号： | P150-A253-A341 |
| 元件分类： | 模拟信号调理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, MDMA10 |
| 封装： | HERMETIC SEALED, METAL PACKAGE-10 |
| 文件页数： | 4/6页 |
| 文件大小： | 1964K |
| 代理商： | P150-A253-A341 |
ELECTRICAL CHARACTERISTICS (VOLTAGE STATUS)
P150 SERIES
Typical values are at 25 ± 5° C
INPUT
DEVICE WITH VOLTAGE STATUS
LIMITS
UNIT
NOTES
Parameter
Symbol
CONDITIONS
-55°C to +105°C (1)
MIN
MAX
Logic supply voltage
VCC
4.5
5.5
Vdc
CONTROL voltage high
VIH
2.0
Vdc
CONTROL voltage low
VIL
0.8
Vdc
Transient
Pulse width = 12.5 msec max.
per MIL-STD-704D
+50
Vdc
2
Spikes
Pulse width = 10 sec max. per
MIL-STD-704D
-600
+600
Vdc
2
REQUIREMENTS
28 Vdc initialization spike voltage
During of output spike at 50%
amplitude shall be 100sec
maximum
5
VPR
5 Vdc initialization control
Vline = 28 Vdc, Vcontrol = 0
Vdc, Vbias = 0 to 5 Vdc, rated at
<1 msec
3
Logic supply current
ICC
VCC=5.5 Vdc
50
mA
4
Load current continuous
ILOAD
100
%I
"ON" state voltage drop
VO
200
mV
5
Leakage current
IL
1
mA
STATUS & TRIP voltage high
VOH
IOH=5mA
2.4
Vdc
STATUS & TRIP voltage low
VOL
IOL=1mA
0.4
Vdc
CONTROL current high
IIH
VI=2.4 Vdc
50
A
CONTROL current low
IIL
VI=0.4 Vdc
10
A
Output "ON" sense voltage
VON
See Timing Diagram (Voltage
Status)
30
70
%
5,6,7
Notes:
1. Unless specified otherwise, test conditions shall be at Vcc=5.0
±0.25Vdc and Vline=28±0.5Vdc. The design shall be capable of
meeting all requirements with Vcc=4.5 to 5.5Vdc.
2. The transient and spike requirements apply only to the 28Vdc
power lines.
3. The device output shall remain off when 5V bias is raised from 0
to 5Vdc.
4. Without any load connected to the STATUS or TRIP outputs.
5. At 100% rated current.
6. Rated resistive load; measurements taken between 10% and
90% points.
7. Percent of actual applied Vline.
Date of issue: 4/10
- 12 -
Page 4 of 6
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