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参数资料
| 型号： | P80C152JA |
| 厂商： | INTEL CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | UNIVERSAL COMMUNICATION CONTROLLER 8-BIT MICROCONTROLLER |
| 中文描述： | 8-BIT, 6 MHz, MICROCONTROLLER, PDIP48 |
| 封装： | PLASTIC, DIP-48 |
| 文件页数： | 17/17页 |
| 文件大小： | 233K |
| 代理商： | P80C152JA |
8XC152JA/JB/JC/JD
DESIGN NOTES
Within the 8XC152 there exists a race condition that may set both the RDN and AE bits at the end of a valid
reception. This will not cause a problem in the application as long as the following steps are followed:
DNever give the receive error interrupt a higher priority than the valid reception interrupt
DDo not leave the valid reception interrupt service routine when AE is set by using a RETI instruction until AE
is cleared. To clear AE set the GREN bit, this enables the receiver. If the user desires that the receiver remain
disabled, clear GREN after setting it before leaving the interrupt service routine.
DIf the AE bit is checked by user software in response to a valid reception interrupt, the status of AE should
be considered invalid.
The race condition is dependent upon both the temperature that the device is currently operating at and the
processing the device received during the wafer fabrication.
When the idle mode is terminated by a hardware reset, the device normally resumes program execution, from
where it left off, up to two machine cycles before the internal reset algorithm takes control. On-chip hardware
inhibits access to internal RAM in this event, but access to the port pins is not inhibited. To eliminate the
possibility of an unexpected write when Idle is terminated by reset, the instruction following the one that
invokes Idle should not be one that writes to a port pin or to external memory.
DATA SHEET REVISION SUMMARY
The following represent the key differences between the ‘‘-003’’ and the ‘‘-002’’ version of the
80C152/83C152 data sheet. Please review this summary carefully.
1. Removed minimum GSC frequency spec when used with an external clock.
2. Change figure ‘‘External Program Memory Read Cycle’’ to show Port 0/Port 5 address floating after PSEN
goes low.
3. Added design note on terminating idle with reset.
4. Added status of PSEN during Power Down mode to Table 3.
5. Moved all notes to back of data sheet.
6. Changed microcomputer to microcontroller.
7. Added External Oscillator start-up capacitance note.
The following represent the key differences between the ‘‘-002’’ and the ‘‘-001’’ version of the 80C152/
83C152 data sheet. Please review this summary carefully.
1. Status of data sheet changed from ‘‘ADVANCED’’ to ‘‘PRELIMINARY’’.
2. 80C152JC, 83C152JC, and 80C152JD were added.
3. Added AE/RDN design note.
4. This revision summary was added.
5. Note
Y
13 was added (Effective ECL spec at higher clock rates).
6. Table
Y
2 changed to Table
Y
3 (Status of pins during Idle/Power Down).
7. Current Table
Y
2 was added (JA vs. JB vs. JC vs. JD matrix).
8. Transmit jitter spec changed from
g
35 ns and
g
70 ns to
g
10 ns.
17
相关PDF资料 |
PDF描述 |
|---|---|
| P80C152JC | UNIVERSAL COMMUNICATION CONTROLLER 8-BIT MICROCONTROLLER |
| P80C152JD | UNIVERSAL COMMUNICATION CONTROLLER 8-BIT MICROCONTROLLER |
| P83C152JA | UNIVERSAL COMMUNICATION CONTROLLER 8-BIT MICROCONTROLLER |
| P83C152JB | UNIVERSAL COMMUNICATION CONTROLLER 8-BIT MICROCONTROLLER |
| P83C152JC | UNIVERSAL COMMUNICATION CONTROLLER 8-BIT MICROCONTROLLER |
相关代理商/技术参数 |
参数描述 |
|---|---|
| P80C152JA-1 | 制造商:INTELC 功能描述: 制造商:Rochester Electronics LLC 功能描述: |
| P80C152JC | 制造商:Rochester Electronics LLC 功能描述: |
| P80C152JC-1 | 制造商:Rochester Electronics LLC 功能描述: |
| P80C152JD | 制造商:INTEL 制造商全称:Intel Corporation 功能描述:UNIVERSAL COMMUNICATION CONTROLLER 8-BIT MICROCONTROLLER |
| P80C154-12 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:8-Bit Microcontroller |
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