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参数资料
| 型号： | P8254 |
| 厂商： | Intersil Corporation |
| 英文描述： | CMOS Programmable Interval Timer |
| 中文描述： | CMOS可编程间隔定时器 |
| 文件页数： | 7/17页 |
| 文件大小： | 142K |
| 代理商： | P8254 |
4-7
1.Read least significant byte.
2.Write new least significant byte.
3.Read most significant byte.
4.Write new most significant byte.
If a counter is programmed to read or write two-byte counts,
the following precaution applies: A program MUST NOT
transfer control between reading the first and second byte to
another routine which also reads from that same Counter.
Otherwise, an incorrect count will be read.
Read-Back Command
The read-back command allows the user to check the count
value, programmed Mode, and current state of the OUT pin
and Null Count flag of the selected counter(s).
The command is written into the Control Word Register and
has the format shown in Figure 5. The command applies to
the counters selected by setting their corresponding bits D3,
D2, D1 = 1.
A0, A1 = 11; CS = 0; RD = 1; WR = 0
The read-back command may be used to latch multiple
counter output latches (OL) by setting the COUNT bit D5 = 0
and selecting the desired counter(s). This signal command
is functionally equivalent to several counter latch commands,
one for each counter latched. Each counter’s latched count
is held until it is read (or the counter is reprogrammed). That
counter is automatically unlatched when read, but other
counters remain latched until they are read. If multiple count
read-back commands are issued to the same counter with-
out reading the count, all but the first are ignored; i.e., the
count which will be read is the count at the time the first
read-back command was issued.
The read-back command may also be used to latch status
information of selected counter(s) by setting STATUS bit D4
= 0. Status must be latched to be read; status of a counter is
accessed by a read from that counter.
The counter status format is shown in Figure 6. Bits D5
through D0 contain the counter’s programmed Mode exactly
as written in the last Mode Control Word. OUTPUT bit D7
contains the current state of the OUT pin. This allows the
user to monitor the counter’s output via software, possibly
eliminating some hardware from a system.
NULL COUNT bit D6 indicates when the last count written to
the counter register (CR) has been loaded into the counting
element (CE). The exact time this happens depends on the
Mode of the counter and is described in the Mode Definitions,
but until the counter is loaded into the counting element (CE),
it can’t be read from the counter. If the count is latched or read
before this time, the count value will not reflect the new count
just written. The operation of Null Count is shown below.
THIS ACTION:
A. Write to the control word register:(1) . . . . . . . . . . Null Count = 1
B. Write to the count register (CR):(2) . . . . . . . . . . . Null Count = 1
C. New count is loaded into CE (CR - CE). . . . . . . . Null Count = 0
(1) Only the counter specified by the control word will have its null
count set to 1. Null count bits of other counters are unaffected.
(2) If the counter is programmed for two-byte counts (least signifi-
cant byte then most significant byte) null count goes to 1 when
the second byte is written.
If multiple status latch operations of the counter(s) are per-
formed without reading the status, all but the first are ignored;
i.e., the status that will be read is the status of the counter at
the time the first status read-back command was issued.
CAUSES:
FIGURE 7. READ-BACK COMMAND EXAMPLE
D7
D6
D5
D4
D3
D2
D1
D0
1
1
COUNT
STATUS
CNT 2 CNT 1 CNT 0
0
D5: 0 = Latch count of selected Counter (s)
D4: 0 = Latch status of selected Counter(s)
D3: 1 = Select Counter 2
D2: 1 = Select Counter 1
D1: 1 = Select Counter 0
D0: Reserved for future expansion; Must be 0
FIGURE 5. READ-BACK COMMAND FORMAT
D7
D6
D5
D4
D3
D2
D1
D0
OUTPUT
NULL
COUNT
RW1 RW0
M2
M1
M0
BCD
D7: 1
=Out pin is 1
=Out pin is 0
=Null count
=Count available for reading
D5 - D0 =Counter programmed mode (See Control Word Formats)
0
D6: 1
0
FIGURE 6. STATUS BYTE
COMMANDS
DESCRIPTION
RESULT
D7
D6
D5
D4
D3
D2
D1
D0
1
1
0
0
0
0
1
0
Read-Back Count and Status of Counter 0
Count and Status Latched for Counter 0
1
1
1
0
0
1
0
0
Read-Back Status of Counter 1
Status Latched for Counter 1
1
1
1
0
1
1
0
0
Read-Back Status of Counters 2, 1
Status Latched for Counter 2,
But Not Counter 1
1
1
0
1
1
0
0
0
Read-Back Count of Counter 2
Count Latched for Counter 2
1
1
0
0
0
1
0
0
Read-Back Count and Status of Counter 1
Count Latched for Counter 1,
But Not Status
1
1
1
0
0
0
1
0
Read-Back Status of Counter 1
Command Ignored, Status Already
Latched for Counter 1
82C54
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