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| 型号： | P83C266 |
| 厂商： | NXP Semiconductors N.V. |
| 英文描述： | Microcontrollers for PAL/SECAM TV with OSD and VST(带 OSD和 VST的在PAL/SECAM TV中应用的微控制器) |
| 中文描述： | 对于PAL微控制器/ OSD和伟仕SECAM电视（带OSD和伟仕的在PAL制式/ SECAM电视中应用的微控制器） |
| 文件页数： | 22/92页 |
| 文件大小： | 382K |
| 代理商： | P83C266 |
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1999 Mar 10
22
Philips Semiconductors
Product specification
Microcontrollers for PAL/SECAM TV
with OSD and VST
P8xCx66 family
11 INTERRUPT SYSTEM
External events and the real-time driven on-chip
peripherals require service by the CPU asynchronous to
the execution of any particular section of code. To tie the
asynchronous activities of these functions to normal
program execution a multiple-source, two-priority-level,
nested interrupt system is provided. The P8xCx66
acknowledges interrupt requests from twelve sources as
shown in Table 20.
Each interrupt vectors to a separate location in program
memory for its service routine. Each source can be
individually enabled or disabled by using corresponding
bits in the Interrupt Enable Registers (IEN0 and IEN1).
The priority level is selected via the Interrupt Priority
Registers (IP0 and IP1). All enabled sources can be
globally disabled or enabled. The minimum width of the
external interrupt signal is
≥
6 XTAL clocks. The maximum
width of the interrupt signal is the total length of all
instructions in the interrupt service routine until the clear
instruction of the IRQ bit. The external interrupts are INT0,
INT1, P1.0, P1.1, P1.2, P1.3, P1.4 and P1.7.
11.1
External interrupts INT2 to INT7 and INT9
Port 1 lines also serve as additional interrupts
INT2 to INT7 (P1.0, P1.1, P1.2, P1.3, P1.4 and P1.7).
INT7 is used by the derivative functional blocks as follows:
X7 VSYNC interrupt 0063H
Using the IX1 register, each pin may be initialized to be
either active HIGH or active LOW except INT7 which is
fixed active HIGH because this interrupt is from another
derivative function. IRQ1 is the Interrupt Request Flag
Register. Each flag will be set on interrupt request but it
must be cleared by software, i.e. via the interrupt software.
11.2
Interrupt priority
Each interrupt source can be set to either high or low
priority. If both priorities are requested simultaneously, the
controller will branch to the high priority vector.
A low priority interrupt can only be interrupted by a high
priority interrupt. A high priority interrupt routine cannot be
interrupted
11.3
Related registers
The following registers are used in conjunction with the
interrupt system.
Table 19
Interrupt registers
REGISTER
ADDRESS
Interrupt Polarity Register (IX1)
Interrupt Request Flag Register (IRQ1)
Interrupt Enable Register 0 (IEN0)
Interrupt Enable Register 1 (IEN1);
interrupts INT2 to INT9
Interrupt Priority Register 0 (IP0)
Interrupt Priority Register 1 (IP1);
interrupts INT2 to INT9
E9H
C0H
A8H
E8H
B8H
F8H
Table 20
Interrupt request (priority within level)
INTERRUPT MNEMONIC
SOURCE
VECTOR ADDRESS
PX0 (highest)
S1
T0
PX2
PX6
PX1
PX3
PX7
T1
PX4
PX5
PX9 (lowest)
external interrupt 0 (INT0)
I
2
C-bus
Timer 0 overflow
P1.0 port line
P1.4 port line
external interrupt 1 (INT1)
P1.1 port line
VSYNC interrupt
Timer 1 overflow
P1.2 port line
P1.3 port line
P1.7 port line
0003H
002BH
000BH
0033H
005BH
0013H
003BH
0063H
001BH
0043H
004BH
0073H
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| P83C266BDR | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Microcontrollers for PAL/SECAM TV with OSD and VST |
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