参数资料
型号: P83C554SBBD
厂商: NXP SEMICONDUCTORS
元件分类: 微控制器/微处理器
英文描述: 80C51 8-bit microcontroller . 6 clock operation 16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I2C, PWM, capture/compare, high I/O, 64L LQFP
中文描述: 8-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP64
封装: 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, SOT-314-2, LQFP-64
文件页数: 5/76页
文件大小: 400K
代理商: P83C554SBBD
Philips Semiconductors
Preliminary specification
80C554/83C554/87C554
80C51 8-bit microcontroller – 6 clock operation
16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I
2
C, PWM,
capture/compare, high I/O, 64L LQFP
2000 Nov 10
5
PIN DESCRIPTION
PIN NO.
MNEMONIC
LQFP
TYPE
NAME AND FUNCTION
V
DD
9
I
Digital Power Supply:
Positive voltage power supply pin during normal operation, idle and
power-down mode.
STADC
10
I
Start ADC Operation:
Input starting analog to digital conversion (ADC operation can also be
started by software).
PWM0
11
O
Pulse Width Modulation:
Output 0.
PWM1
12
O
Pulse Width Modulation:
Output 1.
EW
13
I
Enable Watchdog Timer:
Enable for T3 watchdog timer and disable power-down mode.
P0.0-P0.7
54–61
I/O
Port 0:
Port 0 is an 8-bit open-drain bidirectional I/O port. Port 0 pins that have 1s written to them
float and can be used as high-impedance inputs. Port 0 is also the multiplexed low-order address
and data bus during accesses to external program and data memory. In this application it uses
strong internal pull-ups when emitting 1s. Port 0 is also used to input the code byte during
programming and to output the code byte during verification.
P1.0-P1.7
23–30
23–28
29–30
23–26
27
28
29
30
I/O
I/O
I/O
I
I
I
I/O
I/O
Port 1:
8-bit I/O port. Alternate functions include:
(P1.0-P1.5):
Programmable I/O port pins.
(P1.6, P1.7):
Open drain port pins.
CT0I-CT3I (P1.0-P1.3):
Capture timer input signals for timer T2.
T2 (P1.4):
T2 event input.
RT2 (P1.5):
T2 timer reset signal. Rising edge triggered.
SCL (P1.6):
Serial port clock line I
2
C-bus.
SDA (P1.7):
Serial port data line I
2
C-bus.
Port 1 has four modes selected on a per bit basis by writing to the P1M1 and P1M2 registers as
follows:
P1M1.x
P1M2.x
Mode Description
0
0
Pseudo–bidirectional (standard c51 configuration; default)
0
1
Push-Pull
1
0
High impedance
1
1
Open drain
Port 1 is also used to input the lower order address byte during EPROM programming and
verification. A0 is on P1.0, etc.
P2.0-P2.7
43–50
I/O
Port 2:
8-bit programmable I/O port.
Alternate function: High-order address byte for external memory (A08-A15). Port 2 is also used to
input the upper order address during EPROM programming and verification. A8 is on P2.0, A9 on
P2.1, through A13 on P2.5.
Port 2 has four output modes selected on a per bit basis by writing to the P2M1 and P2M2 registers
as follows:
P2M1.x
P2M2.x
Mode Description
0
0
Pseudo–bidirectional (standard c51 configuration; default)
0
1
Push-Pull
1
0
High impedance
1
1
Open drain
P3.0-P3.7
31–38
31
32
33
34
35
36
37
38
I/O
Port 3:
8-bit programmable I/O port. Alternate functions include:
RxD(P3.0):
Serial input port.
TxD (P3.1):
Serial output port.
INT0 (P3.2):
External interrupt.
INT1 (P3.3):
External interrupt.
T0 (P3.4):
Timer 0 external input.
T1 (P3.5):
Timer 1 external input.
WR (P3.6):
External data memory write strobe.
RD (P3.7):
External data memory read strobe.
Port 3 has four modes selected on a per bit basis by writing to the P3M1 and P3M2 registers as
follows:
P3M1.x
P3M2.x
Mode Description
0
0
Pseudo–bidirectional (standard c51 configuration; default)
0
1
Push–Pull
1
0
High impedance
1
1
Open drain
相关PDF资料
PDF描述
P80C554SBBD 80C51 8-bit microcontroller . 6 clock operation 16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I2C, PWM, capture/compare, high I/O, 64L LQFP
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