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参数资料
| 型号： | P83C770AAR |
| 厂商： | NXP SEMICONDUCTORS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | Microcontrollers for PAL/SECAM TV with OSD and VST(带 OSD和 VST的在PAL/SECAM TV中应用的微控制器) |
| 中文描述： | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PDIP52 |
| 文件页数： | 62/80页 |
| 文件大小： | 266K |
| 代理商： | P83C770AAR |
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1999 Jun 11
62
Philips Semiconductors
Product specification
Microcontrollers for NTSC TVs with On-Screen
Display (OSD) and Closed Caption (CC)
P8xCx70 family
19 MEMORY DATA BIT ALLOCATION
Table 102
Register map bit allocation
Table 103
Memory data/bit allocation
19.1
Interfaces
19.1.1
RGB
AND
B
LANKING
O
UTPUT
The RGB outputs are analog signals derived from a DAC. The output impedance depends on the switched value, but is
low enough to drive the colour decoder.
The polarity and the delay between RGB outputs and the blanking output is programmable. The default setting is active
HIGH (RGB on).
ADDR.
REGISTER NAME
7
6
5
4
3
2
1
0
87F0H
87F1H
87F2H
87F3H
87F4H
87F5H
87F6H
87F7H
87F8H
87F8H
87FCH
87FDH
87FEH
87FFH
Display Control
Text Vertical Position
Text Horizontal Position
Fringing Control
Text Area End
Scroll Area
Scroll Range
RGB Brightness
Status (read)
Status (write)
HSYNC Delay
Odd/Even Align
Reserved
Configuration Register
SRC3
VPOL
HOP1
FRC3
SSH3
SPS3
FBPOL
BUSY
CC
SRC2
HPOL
HOP0
FRC2
SSH2
SPS2
H/V
HSD6
OEA6
PLUS
SRC1
VOL5
TAS5
FRC1
TAE5
SSH1
SPS1
FIELD
SCON
HSD5
OEA5
ADJ
SRC0
VOL4
TAS4
FRC0
TAE4
SSH0
SPS0
SCRL
SCRL
HSD4
OEA4
MIN
FLF
VOL3
TAS3
FRDN
TAE3
SSP3
STS3
BRI3
SCR3
HSD3
OEA3
MSH
VOL2
TAS2
FRDE
TAE2
SSP2
STS2
BRI2
SCR2
HSD2
OEA2
MOD1
VOL1
TAS1
FRDS
TAE1
SSP1
STS1
BRI1
SCR1
HSD1
OEA1
MOD0
VOL0
TAS0
FRDW
TAE0
SSP0
STS0
BRI0
SCR0
HSD0
OEA0
ODD BYTE BITS 3 TO 0
EVEN BYTE BITS 7 TO 0
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
Valid for byte address 8000H to 801FH in display memory: Scroll map
ptr9
ptr8
En.
ptr7
ptr6
ptr5
ptr4
ptr3
ptr2
ptr1
ptr0
Valid for byte address 8020H to 8460H in display memory: Display page, first column position
1 = ser.
1 = at
eof
bgc
for3
box
vert. sync hor.sync
back3
back2
back1
back0
Valid for byte address 8020H to 8460H in display memory: Display page, all columns
0 = par. for3
1 = ser.
for2
fringing
for1
italic
chr7
flash
chr6
box
chr5
overline
chr4
underline back3
chr3
chr2
back2
chr1
back1
chr0
back0
0 = at
Valid for byte address 8020H to 8460H in display memory: Display page, all columns except first position
1 = ser.
Valid for byte address 8700H to 871FH: CLUT
red3
red2
red1
1 = after eof
bgc
for3
box
overline
underline back3
back2
back1
back0
red0
green3
green2
green1
green0
blue3
blue2
blue1
blue0
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