参数资料
型号: P83CL781HDH
厂商: NXP SEMICONDUCTORS
元件分类: 微控制器/微处理器
英文描述: Low voltage 8-bit microcontrollers with UART and I2C-bus
中文描述: 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PQFP44
封装: 10 X 10 MM, 1.75 MM HEIGHT, PLASTIC, SOT-307-2, QFP-44
文件页数: 9/76页
文件大小: 342K
代理商: P83CL781HDH
1997 Mar 14
9
Philips Semiconductors
Product specification
Low voltage 8-bit microcontrollers with
UART and I
2
C-bus
P83CL781; P83CL782
7.2
Pin description
SYMBOL
PIN
DESCRIPTION
DIP40
QFP44
P1.0/INT2/T2
P1.1/INT3/T2EX
P1.2/INT4
P1.3/INT5
P1.4/INT6
P1.5/INT7
P1.6/INT8/SCL
P1.7/INT9/SDA
1
2
3
4
5
6
7
8
40
41
42
43
44
1
2
3
Port 1:
8-bit bidirectional I/O port (P1.0 to P1.7). Port pins that have logic 1s
written to them are pulled HIGH by internal pull-ups, and in this state can be
used as inputs (note that P1.6 and P1.7 are open-drain only). As inputs, Port 1
pins that are externally pulled LOW will source current (I
IL
) due to the internal
pull-ups. Port 1 output buffers can sink/source 4 LS TTL loads.
Alternative functions:
– INT2 to INT9 are external interrupt inputs
– T2 and T2EX are the Timer/event counter 2 inputs
– SCL and SDA are the I
2
C-bus clock and data lines.
Reset:
A HIGH level on this pin for two machine cycles while the oscillator is
running, resets the device.
Not connected.
Port 3:
8-bit bidirectional I/O port (P3.0 to P3.7).
Same characteristics as Port 1.
Alternative functions:
– RXD/data is the UART serial data input (asynchronous) or data I/O
(synchronous)
– TXD/clock is the UART serial data output (asynchronous) or clock output
(synchronous)
INT0 and INT1 are external interrupt lines
– T0 and T1 are external inputs for Timer 0 and Timer 1 respectively
– WR is the external memory write strobe andRD is the external memory read
strobe.
Crystal Output:
Output of the inverting amplifier that forms the oscillator. Left
open-circuit when an external oscillator clock is used.
Crystal Input:
Input to the inverting amplifier that forms the oscillator, also the
input for an externally generated clock source.
Ground:
Circuit ground potential.
Test Input:
Must be connected to V
SS
or left open.
Port 2:
8-bit bidirectional I/O port (P2.0 to P2.7).
Same characteristics as Port 1.
High-order addressing:
A8 to A15 make up the high-order address byte
during accesses to external memory that use 16-bit addresses
(MOVX@DPTR). In this application the pins use the strong internal pull-ups
when emitting logic 1's. During accesses to external memory that use 8-bit
addresses (MOVX@Ri), the pins emit the contents of the P2 Special Function
Register.
RST
9
4
n.c.
P3.0/RXD/data
P3.1/TXD/clock
P3.2/INT0
P3.3/INT1
P3.4/T0
P3.5/T1
P3.6/WR
P3.7/RD
6
5
7
8
9
10
11
12
13
10
11
12
13
14
15
16
17
XTAL2
18
14
XTAL1
19
15
V
SS
TEST/V
SS
P2.0/A8
P2.1/A9
P2.2/A10
P2.3/A11
P2.4/A12
P2.5/A13
P2.6/A14
P2.7/A15
20
21
22
23
24
25
26
27
28
16
17
18
19
20
21
22
23
24
25
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