参数资料
型号: P83CL782HDH
厂商: NXP SEMICONDUCTORS
元件分类: 微控制器/微处理器
英文描述: Low voltage 8-bit microcontrollers with UART and I2C-bus
中文描述: MROM, 6 MHz, MICROCONTROLLER, PQFP44
封装: 14 X 14 MM, 2.20 MM HEIGHT, PLASTIC, SOT-205-1, QFP-44
文件页数: 11/76页
文件大小: 342K
代理商: P83CL782HDH
1997 Mar 14
11
Philips Semiconductors
Product specification
Low voltage 8-bit microcontrollers with
UART and I
2
C-bus
P83CL781; P83CL782
8
FUNCTIONAL DESCRIPTION OVERVIEW
This chapter gives a brief overview of the device. The
detailed functional description is in the following chapters:
Chapter 9 “Memory organization”
Chapter 10 “I/O facilities”
Chapter 11 “Timer/event counters”
Chapter 12 “Reduced power modes”
Chapter 13 “I
2
C-bus serial I/O”
Chapter 14 “Standard serial interface SIO0: UART”
Chapter 15 “Interrupt system”
Chapter 16 “Oscillator circuitry”
Chapter 17 “Reset”.
8.1
General
The P83CL78x is a stand-alone high-performance CMOS
microcontroller designed for use in real-time applications
such as instrumentation, industrial control, intelligent
computer peripherals and consumer products. The device
provides hardware features, architectural enhancements
and new instructions to function as a controller for
applications requiring up to 64 kbytes of Program Memory
and/or up to 64 kbytes of data storage.
The P83CL78x contains a non-volatile 16 kbyte read-only
Program Memory; a static 256 byte read/write Data
Memory; 32 I/O lines; three 16-bit timer/event counters; a
fifteen-source, two priority-level, nested interrupt structure
and on-chip oscillator and timing circuit.
The device has two software-selectable modes of reduced
activity for power reduction:
Idle mode
; freezes the CPU while allowing the timers,
serial I/O and interrupt system to continue functioning.
Power-down mode
; saves the RAM contents but
freezes the oscillator causing all other chip functions to
be inoperative.
In addition, two serial interfaces are provided on-chip:
a standard UART serial interface, and
a standard I
2
C-bus serial interface. The I
2
C-bus serial
interface has byte-oriented master and slave functions
allowing communication with the whole family of I
2
C-bus
compatible devices.
8.2
CPU timing
A machine cycle consists of a sequence of 6 states. Each
state lasts for two oscillator periods, thus a machine cycle
takes 12 oscillator periods or 1
μ
s if the oscillator
frequency (f
osc
) is 12 MHz.
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