参数资料
型号: P87C51UBAA
厂商: NXP SEMICONDUCTORS
元件分类: 微控制器/微处理器
英文描述: 80C51 8-bit microcontroller family 4K/128 OTP/ROM/ROMless low voltage 2.7V.5.5V, low power, high speed 33 MHz
中文描述: 8-BIT, OTPROM, 33 MHz, MICROCONTROLLER, PQCC44
封装: PLASTIC, MO-047, SOT187-2, LCC-44
文件页数: 14/34页
文件大小: 394K
代理商: P87C51UBAA
2001 Apr 06
14
Philips Semiconductors
Preliminary specification
P87C51MB2/P87C51MC2
80C51 8-bit microcontroller family with extended memory
64KB/96KB OTP with 2KB/3KB RAM
DATA RAM
The P87C51MB2 and P87C51MC2 have 2 Kbytes and 3 K bytes of on-chip RAM respectively. Usages of the different data
segments are described in the 51MX Architecture Reference.
PORT 4
The P87C51Mx2 has a fifth I/O port (Port 4) that is shared with the second UART pins (RXD1 and TXD1) and two of the SPI pins
(MISO and SS). This port is also bit addressable and can be accessed in the same manner as any other ports, except that the
associated SFR is in the extended SFR space. Accesses to this SFR space is the same as those to the conventional SFR space
except that the instructions must be preceeded by an escape code (A5h), as described in the 51MX Architecture Reference.
LOW POWER MODES
The P87C51Mx2 supports the standard 51MX low power modes - Stop Clock Mode, Idle Mode and Power-Down Mode.
The PCON register is the same as the standard 51MX PCON register. Note that bits PCON.7 and PCON.6 are for UART
configurations (see section "UARTs").
ONCE
MODE
The ONCE (“On-Circuit Emulation”) Mode facilitates testing and debugging of systems without the device having to be removed
from the circuit. It is supported in the P87C51Mx2.
PERIPHERALS
The P87C51Mx2 peripherals are described in more detail in the User Manual. The on-chip peripherals include:
Timers:
- Timers 0 and 1.
- Timer 2.
Note:
When Timer 1 or Timer 2 can only be used as a baud rate generator for UART 0, but not for UART 1.
Two enhanced UARTs with an independent Baud Rate Generator - The section "UARTs" provides information regarding the
two UARTs.
Note:
UART 1 shares the RXD1 and TXD1 with the SPI pins. The SPEN (SPCTL.6) bit must be cleared ’0’ (reset value) to
enable UART 1 operation.
Serial Peripheral Interface (SPI).
Note:
The SPI shares pins with the UART 1 shares the RXD1 and TXD1 with the SPI pins.
The SPEN (SPCTL.6) bit must be set to ’1’ to enable SPI operation.
Watchdog Timer.
Programmable Counter Array (PCA).
Data Memory
Size (in Bytes)
Type
Description
P87C51MB2
P87C51MC2
DATA
memory that can be addressed directly and indirectly
128
128
IDATA
memory that can be addressed indirectly (where direct address is for SFR
only)
128
128
EDATA
memory that can only be addressed indirectly
1024
1024
XDATA
memory (on-chip "External Data") that is accessed using the MOVX
instructions
768
1792
Total
2048
3072
Table 2: On-Chip Data Memory Usage.
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